commit f727d0e6219e6d5a9f91326f01b85aa563e37bb9
author Peter Crosthwaite <peter.crosthwaite@xilinx.com> Mon Mar 31 21:31:09 2014 -0700
committer Peter Maydell <peter.maydell@linaro.org> Thu Apr 17 21:34:06 2014 +0100
tree 94fa3b315fa7e8ab3f77d6a0cd6ce6103c95edbd
parent b5cde1da0a67aa9841da46ca804b48098e63e838

timer: cadence_ttc: Fix match register write logic

This switch logic should not fall through. Fix.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 74147b4c017c904364955cc73107f90e6ac8ba74.1396326389.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

hw/timer/cadence_ttc.c

diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c
index a279bce..28cb328 100644
--- a/hw/timer/cadence_ttc.c
+++ b/hw/timer/cadence_ttc.c
@@ -346,11 +346,13 @@
     case 0x34:
     case 0x38:
         s->reg_match[0] = value & 0xffff;
+        break;
 
     case 0x3c: /* match register */
     case 0x40:
     case 0x44:
         s->reg_match[1] = value & 0xffff;
+        break;
 
     case 0x48: /* match register */
     case 0x4c: