commit fec5fa0210a853635d3011fbce26f137206958c6
author aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> Tue Sep 02 00:09:08 2008 +0000
committer aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> Tue Sep 02 00:09:08 2008 +0000
tree e7f8390850514517680a054fd9ebe39f7c835211
parent 37e828b44b4b087ba9ca9beca754cbcfd2c2f95b

Reset I32_APIC_BASE on system RESET

Should be done according to spec.

Signed-off-by: Gleb Natapov <gleb@qumranet.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5128 c046a42c-6fe2-441c-8c8c-71466251a162

hw/apic.c

diff --git a/hw/apic.c b/hw/apic.c
index 43d748c..64e75ad 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -869,6 +869,10 @@
 static void apic_reset(void *opaque)
 {
     APICState *s = opaque;
+
+    s->apicbase = 0xfee00000 |
+        (s->id ? 0 : MSR_IA32_APICBASE_BSP) | MSR_IA32_APICBASE_ENABLE;
+
     apic_init_ipi(s);
 
     if (s->id == 0) {
@@ -906,8 +910,6 @@
     s->id = last_apic_id++;
     env->cpuid_apic_id = s->id;
     s->cpu_env = env;
-    s->apicbase = 0xfee00000 |
-        (s->id ? 0 : MSR_IA32_APICBASE_BSP) | MSR_IA32_APICBASE_ENABLE;
 
     apic_reset(s);