1. e1ccc05 tcg: Change tcg_global_mem_new_* to take a TCGv_ptr by Richard Henderson · 12 years ago
  2. 508127e log: do not unnecessarily include qom/cpu.h by Paolo Bonzini · 9 years ago
  3. b98ba68 tilegx: Clean up includes by Peter Maydell · 9 years ago
  4. 2a080ce target-tilegx: Implement prefetch instructions in pipe y2 by Chen Gang · 9 years ago
  5. 4c315c2 qdev: Protect device-list-properties against broken devices by Markus Armbruster · 9 years ago
  6. 31c9bd1 Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20151007' into staging by Peter Maydell · 9 years ago
  7. 4e5e121 tcg: Remove gen_intermediate_code_pc by Richard Henderson · 10 years ago
  8. bad729e tcg: Pass data argument to restore_state_to_opc by Richard Henderson · 10 years ago
  9. 190ce7f tcg: Add TCG_MAX_INSNS by Richard Henderson · 10 years ago
  10. dc03246 target-*: Drop cpu_gen_code define by Richard Henderson · 10 years ago
  11. 959082f target-*: Increment num_insns immediately after tcg_gen_insn_start by Richard Henderson · 10 years ago
  12. 667b8e2 target-*: Unconditionally emit tcg_gen_insn_start by Richard Henderson · 10 years ago
  13. 765b842 tcg: Rename debug_insn_start to insn_start by Richard Henderson · 10 years ago
  14. fec7daa target-tilegx: Support iret instruction and related special registers by Chen Gang · 9 years ago
  15. 77b3adc target-tilegx: Use TILEGX_EXCP_OPCODE_UNKNOWN and TILEGX_EXCP_OPCODE_UNIMPLEMENTED correctly by Chen Gang · 9 years ago
  16. a419e22 target-tilegx: Implement v2mults instruction by Chen Gang · 9 years ago
  17. aaf893a target-tilegx: Implement v?int_* instructions. by Chen Gang · 9 years ago
  18. 78affcb target-tilegx: Implement v2sh* instructions by Chen Gang · 9 years ago
  19. 133b84c target-tilegx: Handle nofault prefetch instructions by Richard Henderson · 9 years ago
  20. 95df61e target-tilegx: Fix a typo for mnemonic about "ld_add" by Chen Gang · 9 years ago
  21. a0577d2 target-tilegx: Use TILEGX_EXCP_SIGNAL instead of TILEGX_EXCP_SEGV by Richard Henderson · 9 years ago
  22. dd8070d target-tilegx: Decode ill pseudo-instructions by Chen Gang · 9 years ago
  23. f723287 target-tilegx: Let x1 pipe process bpt instruction only by Chen Gang · 9 years ago
  24. 9ff5b57 target-tilegx: Implement complex multiply instructions by Richard Henderson · 9 years ago
  25. 0b4232f target-tilegx: Implement table index instructions by Richard Henderson · 9 years ago
  26. ba1fc78 target-tilegx: Implement crc instructions by Richard Henderson · 9 years ago
  27. 38c949f target-tilegx: Implement v1multu instruction by Chen Gang · 9 years ago
  28. c6876d7 target-tilegx: Implement v*add and v*sub instructions by Chen Gang · 9 years ago
  29. 0ab0a3d target-tilegx: Implement v*shl, v*shru, and v*shrs instructions by Chen Gang · 9 years ago
  30. 0551301 target-tilegx: Tidy simd_helper.c by Richard Henderson · 9 years ago
  31. 461aa67 target-tilegx: Handle v1shl, v1shru, v1shrs by Richard Henderson · 10 years ago
  32. 3be19e8 target-tilegx: Handle v1shli, v1shrui by Richard Henderson · 10 years ago
  33. 5151c69 target-tilegx: Handle v4int_l/h by Richard Henderson · 10 years ago
  34. 0583b23 target-tilegx: Handle atomic instructions by Richard Henderson · 10 years ago
  35. 03b217b target-tilegx: Handle mtspr, mfspr by Richard Henderson · 10 years ago
  36. e7346cf target-tilegx: Handle v1cmpeq, v1cmpne by Richard Henderson · 10 years ago
  37. 661ff74 target-tilegx: Handle mask instructions by Richard Henderson · 10 years ago
  38. 4ff4977 target-tilegx: Handle scalar multiply instructions by Richard Henderson · 10 years ago
  39. f090f9f target-tilegx: Handle conditional move instructions by Richard Henderson · 10 years ago
  40. 2369976 target-tilegx: Handle shift instructions by Richard Henderson · 10 years ago
  41. c06b181 target-tilegx: Handle bitfield instructions by Richard Henderson · 10 years ago
  42. d5dbd6e target-tilegx: Implement system and memory management instructions by Richard Henderson · 10 years ago
  43. 73c5437 target-tilegx: Handle comparison instructions by Richard Henderson · 10 years ago
  44. e04e98b target-tilegx: Handle conditional branch instructions by Richard Henderson · 10 years ago
  45. c230a99 target-tilegx: Handle unconditional jump instructions by Richard Henderson · 10 years ago
  46. 01cd675 target-tilegx: Handle post-increment load and store instructions by Richard Henderson · 10 years ago
  47. 0426335 target-tilegx: Handle basic load and store instructions by Richard Henderson · 10 years ago
  48. 7f41a8d target-tilegx: Handle most bit manipulation instructions by Richard Henderson · 10 years ago
  49. 89b8c75 target-tilegx: Handle arithmetic instructions by Richard Henderson · 10 years ago
  50. a9fdfc7 target-tilegx: Handle simple logical operations by Richard Henderson · 10 years ago
  51. 444e06b target-tilegx: Add TILE-Gx building files by Chen Gang · 10 years ago
  52. 9b9dc7a target-tilegx: Generate SEGV properly by Richard Henderson · 10 years ago
  53. 8fd29dd target-tilegx: Framework for decoding bundles by Richard Henderson · 10 years ago
  54. 5b212be target-tilegx: Add several helpers for instructions translation by Chen Gang · 10 years ago
  55. 9f64170 target-tilegx: Add cpu basic features for linux-user by Chen Gang · 10 years ago
  56. b69773a target-tilegx: Add special register information from Tilera Corporation by Chen Gang · 10 years ago
  57. 4fe2218 target-tilegx: Fix LDNA_ADD_IMM8_OPCODE_X1 by Richard Henderson · 10 years ago
  58. c6c00e1 target-tilegx: Modify _SPECIAL_ opcodes by Richard Henderson · 10 years ago
  59. 2c56c87 target-tilegx: Modify opcode_tilegx.h to fit QEMU usage by Chen Gang · 10 years ago
  60. b1406c6 target-tilegx: Add opcode basic implementation from Tilera Corporation by Chen Gang · 10 years ago