Google Git
Sign in
qemu-android / qemu-android / 1d2a67f89abee0cef4e3d8a8dec739ef0be77120 / tcg / ppc
  1. ecdffbc tcg/ppc: Remove unused s_bits variable by malc · 12 years ago
  2. c878da3 tcg/ppc32: Use trampolines to trim the code size for mmu slow path accessors by malc · 12 years ago
  3. ed224a5 tcg/ppc: ld/st optimization by malc · 12 years ago
  4. 07e10e5 tcg: Remove TCG_TARGET_HAS_GUEST_BASE define by Peter Maydell · 12 years ago
  5. 0aed257 tcg: Add TCG_COND_NEVER, TCG_COND_ALWAYS by Richard Henderson · 13 years ago
  6. 626cd05 tcg: remove obsolete jmp op by Aurelien Jarno · 12 years ago
  7. 23f3ff2 tcg/ppc32: Implement movcond32 by malc · 13 years ago
  8. 6e17d0c tcg: Remove tcg_target_get_call_iarg_regs_count by Stefan Weil · 13 years ago
  9. ffc5ea0 tcg: Introduce movcond by Richard Henderson · 13 years ago
  10. 89c3333 Remove unused CONFIG_TCG_PASS_AREG0 and dead code by Blue Swirl · 13 years ago
  11. affe518 TCG: Fix compile breakage in tcg_dump_ops by Alexander Graf · 13 years ago
  12. 24f50d7 tcg/ppc: Handle _CALL_DARWIN being undefined on Darwin by Andreas Färber · 13 years ago
  13. 1b3e76e tcg/ppc: Fix CONFIG_TCG_PASS_AREG0 mode by Andreas Färber · 13 years ago
  14. a082615 tcg/ppc: Clobber r5 for 64-bit qemu_ld by Andreas Färber · 13 years ago
  15. d831fdb tcg/ppc: Don't hardcode register numbers by Andreas Färber · 13 years ago
  16. c1696d9 tcg/ppc: Do not overwrite lower address word on Darwin and AIX by Andreas Färber · 13 years ago
  17. f05ae53 Bail out if CONFIG_TCG_PASS_AREG0 is defined by malc · 13 years ago
  18. e141ab5 softmmu templates: optionally pass CPUState to memory access functions by Blue Swirl · 14 years ago
  19. 6a18ae2 i386: Remove REGPARM by Blue Swirl · 13 years ago
  20. 9349b4f Rename CPUState -> CPUArchState by Andreas Färber · 13 years ago
  21. 2a534af tcg: Use TCGReg for standard tcg-target entry points. by Richard Henderson · 13 years ago
  22. 771142c tcg: Standardize on TCGReg as the enum for hard registers by Richard Henderson · 13 years ago
  23. ce285b1 tcg: TCG targets may define tcg_qemu_tb_exec by Stefan Weil · 14 years ago
  24. 840f586 tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.h by Stefan Weil · 14 years ago
  25. 70d705f tcg/ppc/tcg-target.c: Avoid 'set but not used' gcc warnings by Peter Maydell · 14 years ago
  26. 350dba6 tcg/ppc32: implement deposit_i32 by malc · 14 years ago
  27. 25c4d9c tcg: Always define all of the TCGOpcode enum members. by Richard Henderson · 14 years ago
  28. 136a0b5 TCG/PPC: use stack for TCG temps by Blue Swirl · 14 years ago
  29. 1a2eb16 tcg/ppc: Remove tcg_out_addi by malc · 14 years ago
  30. 614f104 Delegate setup of TCG temporaries to targets by Blue Swirl · 14 years ago
  31. cea5f9a cpu-exec.c: avoid AREG0 use by Blue Swirl · 14 years ago
  32. e9119cd TCG: Fix Darwin/ppc calling convention recognition by Andreas Färber · 15 years ago
  33. b9e946c tcg-ppc: Conditionally reserve TCG_GUEST_BASE_REG. by Richard Henderson · 15 years ago
  34. e4d58b4 tcg: Make some tcg-target.c routines static. by Richard Henderson · 15 years ago
  35. 3b6dac3 tcg: Add TYPE parameter to tcg_out_mov. by Richard Henderson · 15 years ago
  36. 606257c tcg/ppc: Remove redundant comparison from brcond2 by malc · 15 years ago
  37. efe72c8 tcg/ppc: Fix signed versions of brcond2 by malc · 15 years ago
  38. f7e2aca tcg/ppc: Fix typo by malc · 15 years ago
  39. a884dcb tcg/ppc: Implment bswap16/32 by malc · 15 years ago
  40. aa77beb tcg/ppc: Implement eqv, nand and nor by malc · 15 years ago
  41. 355b194 Split TLB addend and target_phys_addr_t by Paul Brook · 15 years ago
  42. 36368cf tcg/ppc: Fix not_i32 by malc · 15 years ago
  43. 86feb1c tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs. by Richard Henderson · 15 years ago
  44. 32d98fb tcg: Allow target-specific implementation of NOR. by Richard Henderson · 15 years ago
  45. 9940a96 tcg: Allow target-specific implementation of NAND. by Richard Henderson · 15 years ago
  46. 8d625cf tcg: Allow target-specific implementation of EQV. by Richard Henderson · 15 years ago
  47. 8a56e84 tcg: Use TCGCond where appropriate. by Richard Henderson · 15 years ago
  48. a975160 tcg: Name the opcode enumeration. by Richard Henderson · 15 years ago
  49. a63b582 remove remaining occurrences AREG[1-9] and TCG_AREG[1-9] by Paolo Bonzini · 15 years ago
  50. 35f6b59 tcg/ppc[64]: Only define addend load helpers in softmmu case by malc · 15 years ago
  51. d616cf1 tcg/ppc: Fix right rotation by malc · 15 years ago
  52. 98b8d95 tcg/ppc: Fix typo by malc · 15 years ago
  53. 65fe043 tcg/ppc: Implement some of the optional ops by malc · 15 years ago
  54. 30c0c76 tcg: fix build on 32-bit hppa, ppc and sparc hosts by Jay Foad · 15 years ago
  55. 3682825 tcg: Add comments for all optional instructions not implemented. by Richard Henderson · 15 years ago
  56. 6ec8523 tcg/ppc: Consistently use calling convention selection macros by malc · 15 years ago
  57. 5da79c8 Use ppc host calling convention definitions to set TCG_TARGET_CALL_{ALIGN_ARGS,STACK_OFFSET}. by Juergen Lock · 15 years ago
  58. 27a7797 tcg/ppc32: proper setcond implementation by malc · 15 years ago
  59. b0809bf tcg/ppc32: implement setcond[2] by malc · 15 years ago
  60. d937032 tcg/ppc: always use tcg_out_call by malc · 16 years ago
  61. c45851c When targeting PPU use rlwinm instead of andi. if possible by malc · 16 years ago
  62. a71836d Fix rbase initialization by malc · 16 years ago
  63. f6548c0 PPC 32/64 GUEST_BASE support by malc · 16 years ago
  64. 4f4a67a Fix LHZX opcode value by malc · 16 years ago
  65. 9de187a Whack [LS]MW by malc · 16 years ago
  66. e23f2f3 Remove reserved registers from tcg_target_reg_alloc_order by malc · 16 years ago
  67. e63d7ab Prune unused TCG_AREGs by blueswir1 · 16 years ago
  68. eb2eb1d Add missing r24..r26 to calle save registers by malc · 16 years ago
  69. 5db3ee7 R13 is reserved for small data area pointer by SVR4 PPC ABI by malc · 16 years ago
  70. b1503cd Use the ARRAY_SIZE() macro where appropriate. by malc · 16 years ago
  71. 902b3d5 Introduce and use cache-utils.[ch] by malc · 16 years ago
  72. b29fe3e Preliminary AIX support by malc · 16 years ago
  73. 2946898 Rename misnamed BACK_CHAIN_OFFSET to LR_OFFSET by malc · 16 years ago
  74. d4a9eb1 Add some missing static and const qualifiers, reg_names only used if NDEBUG set by blueswir1 · 16 years ago
  75. f8edcba Avoid clobbering input register in qemu_ld64+bswap+useronly case by malc · 17 years ago
  76. 79383c9 Fix some warnings that would be generated by gcc -Wredundant-decls by blueswir1 · 17 years ago
  77. 70fa887 Relax qemu_ld/st constraints for !SOFTMMU case by malc · 17 years ago
  78. bf6bca5 Account for MacOS X ABI reserved space in linkage area (Andreas Faerber) by malc · 17 years ago
  79. f9bf298 Preliminary MacOS X on PPC32 support by malc · 17 years ago
  80. 5278154 On ppc32 make tb_set_jmp_target1 behave like it does on a ppc64 by malc · 17 years ago
  81. 000a2d8 Do not try handle "special" arguments of and/or/xor/shl/shr, upper level does it by malc · 17 years ago
  82. e46b968 Provide extNs_M instructions by malc · 17 years ago
  83. e924c48 Fuse EQ and NE handling in tcg_out_brcond2 by malc · 17 years ago
  84. 8c5e95d Mask LL portion of B to 24 bits in tcg_out_b (Thanks to Thiemo Seufer) by malc · 17 years ago
  85. ca88500 According to gcc-4.3.0/gcc/config/rs6000/crtsavres.asm R13 is volatile by malc · 17 years ago
  86. a35e86c Shuffle contents of tcg_target_reg_alloc_order by malc · 17 years ago
  87. 17ca26e Save LR into proper place on callers stack frame by malc · 17 years ago
  88. c596def Reimplement brcond2 and refactor brcond by malc · 17 years ago
  89. 0d5bd36 Remove stray variable by malc · 17 years ago
  90. 77b73de Use rem/div[u]_i32 drop div[u]2_i32 by malc · 17 years ago
  91. fa4fbfb Emit trampolines manually in prologue by malc · 17 years ago
  92. 5d79488 Fix test for signed div fast path by malc · 17 years ago
  93. 398ce98 Fix div[u]2. by malc · 17 years ago
  94. 0a878c4 PPC TCG Fixes by malc · 17 years ago
  95. 932a690 support of long calls for PPC (malc) by bellard · 17 years ago
  96. f3f478a Fix signed/unsigned issues of immediate version of brcond (malc) by bellard · 17 years ago
  97. 2662e13 ppc TCG target (malc) by bellard · 17 years ago