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qemu-android
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72bc6f1bf710e205f175af9b1fc8bbd83e8da71f
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target-mips
92414b3
TCG: Use gen_opc_buf from context instead of global variable.
by Evgeny Voevodin
· 12 years ago
efd7f48
TCG: Use gen_opc_ptr from context instead of global variable.
by Evgeny Voevodin
· 12 years ago
6801038
target-mips: fix wrong microMIPS opcode encoding
by 陳韋任 (Wei-Ren Chen)
· 12 years ago
7c2c3ea
target-mips: Fix seg fault for LUI when MIPS_DEBUG_DISAS==1.
by Eric Johnson
· 12 years ago
f4359b9
disas: avoid using cpu_single_env
by Blue Swirl
· 13 years ago
1cfd981
target-mips: use ULL for 64 bit constants
by Blue Swirl
· 12 years ago
98c8a73
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
by Anthony Liguori
· 12 years ago
286d52e
target-mips: don't flush extra TLB on permissions upgrade
by Aurelien Jarno
· 12 years ago
bc3e45e
target-mips: fix TLBR wrt SEGMask
by Aurelien Jarno
· 12 years ago
e0d002f
target-mips: use deposit instead of hardcoded version
by Aurelien Jarno
· 12 years ago
5112718
target-mips: optimize ddiv/ddivu/div/divu with movcond
by Aurelien Jarno
· 12 years ago
acf1246
target-mips: implement movn/movz using movcond
by Aurelien Jarno
· 12 years ago
2d2826b
target-mips: don't use local temps for store conditional
by Aurelien Jarno
· 12 years ago
fc40787
target-mips: implement unaligned loads using TCG
by Aurelien Jarno
· 12 years ago
18bba4d
target-mips: simplify load/store microMIPS helpers
by Aurelien Jarno
· 12 years ago
3cee305
target-mips: optimize load operations
by Aurelien Jarno
· 12 years ago
2910c6c
target-mips: cleanup load/store operations
by Aurelien Jarno
· 12 years ago
5f7319c
target-mips: restore CPU state after an FPU exception
by Aurelien Jarno
· 12 years ago
05993cd
target-mips: use softfloat constants when possible
by Aurelien Jarno
· 12 years ago
4cc2e5f
target-mips: cleanup float to int conversion helpers
by Aurelien Jarno
· 12 years ago
5dbe90b
target-mips: fix FPU exceptions
by Aurelien Jarno
· 12 years ago
4a587b2
target-mips: keep softfloat exception set to 0 between instructions
by Aurelien Jarno
· 12 years ago
b3d6cd4
target-mips: use the softfloat floatXX_muladd functions
by Aurelien Jarno
· 12 years ago
1e0e239
target-mips: do not save CPU state when using retranslation
by Aurelien Jarno
· 12 years ago
4636401
target-mips: correctly restore btarget upon exception
by Aurelien Jarno
· 12 years ago
40e3acc
target-mips: remove #if defined(TARGET_MIPS64) in opcode enums
by Aurelien Jarno
· 12 years ago
b30706d
target-mips: Change TODO file
by Jia Liu
· 12 years ago
af13ae0
target-mips: Add ASE DSP processors
by Jia Liu
· 12 years ago
b53371e
target-mips: Add ASE DSP accumulator instructions
by Jia Liu
· 12 years ago
2669056
target-mips: Add ASE DSP compare-pick instructions
by Jia Liu
· 12 years ago
1cb6686
target-mips: Add ASE DSP bit/manipulation instructions
by Jia Liu
· 12 years ago
a22260a
target-mips: Add ASE DSP multiply instructions
by Jia Liu
· 12 years ago
77c5fa8
target-mips: Add ASE DSP GPR-based shift instructions
by Jia Liu
· 12 years ago
461c08d
target-mips: Add ASE DSP arithmetic instructions
by Jia Liu
· 12 years ago
9b1a1d6
target-mips: Add ASE DSP load instructions
by Jia Liu
· 12 years ago
e45a93e
target-mips: Add ASE DSP branch instructions
by Jia Liu
· 12 years ago
4133498
Use correct acc value to index cpu_HI/cpu_LO rather than using a fix number
by Jia Liu
· 12 years ago
853c324
target-mips: Add ASE DSP resources access check
by Jia Liu
· 12 years ago
235eb01
target-mips: Add ASE DSP internal functions
by Jia Liu
· 12 years ago
3993c6b
cpus: Pass CPUState to [qemu_]cpu_has_work()
by Andreas Färber
· 13 years ago
d73ee8a
target-mips: Use TCG registers for the FPU.
by Richard Henderson
· 12 years ago
95bf787
target-mips: rename helper flags
by Aurelien Jarno
· 12 years ago
a8170e5
Rename target_phys_addr_t to hwaddr
by Avi Kivity
· 12 years ago
6f4d6b0
target-mips: Pass MIPSCPU to mips_vpe_sleep()
by Andreas Färber
· 12 years ago
c6679e9
target-mips: Pass MIPSCPU to mips_tc_sleep()
by Andreas Färber
· 12 years ago
b35d77d
target-mips: Pass MIPSCPU to mips_vpe_is_wfi()
by Andreas Färber
· 12 years ago
135dd63
target-mips: Pass MIPSCPU to mips_tc_wake()
by Andreas Färber
· 12 years ago
81bad50
target-mips: Clean up other_cpu in helper_{d,e}vpe()
by Andreas Färber
· 12 years ago
fdefe51
Emit debug_insn for CPU_LOG_TB_OP_OPT as well.
by Richard Henderson
· 13 years ago
bd277fa
target-mips: Implement Loongson Multimedia Instructions
by Richard Henderson
· 13 years ago
fb7729e
target-mips: Always evaluate debugging macro arguments
by Richard Henderson
· 13 years ago
9fa7748
target-mips: Fix MIPS_DEBUG.
by Richard Henderson
· 13 years ago
e1050a7
target-mips: Set opn in gen_ldst_multiple.
by Richard Henderson
· 13 years ago
895c2d0
target-mips: switch to AREG0 free mode
by Blue Swirl
· 13 years ago
03e6e50
MIPS/user: Fix reset CPU state initialization
by Maciej W. Rozycki
· 13 years ago
36c6711
target-mips: allow microMIPS SWP and SDP to have RD equal to BASE
by Eric Johnson
· 14 years ago
2e15497
target-mips: add privilege level check to several Cop0 instructions
by Eric Johnson
· 14 years ago
b316728
mips-linux-user: Always support rdhwr.
by Richard Henderson
· 13 years ago
0516867
target-mips: Streamline indexed cp1 memory addressing.
by Richard Henderson
· 13 years ago
13d24f4
Fix order of CVT.PS.S operands
by Richard Sandiford
· 13 years ago
d22d728
Fix operands of RECIP2.S and RECIP2.PS
by Richard Sandiford
· 13 years ago
6fc97fa
target-mips: Fix some helper functions (VR54xx multiplication)
by Stefan Weil
· 13 years ago
9415913
target-mips: Enable access to required RDHWR hardware registers
by Meador Inge
· 13 years ago
f1cb095
MIPS: Correct FCR0 initialization
by Nathan Froyd
· 13 years ago
fbe37ef
build: move other target-*/ objects to nested Makefile.objs
by Paolo Bonzini
· 13 years ago
9cdc8df
build: move libobj-y variable to nested Makefile.objs
by Paolo Bonzini
· 13 years ago
5e8861a
build: move obj-TARGET-y variables to nested Makefile.objs
by Paolo Bonzini
· 13 years ago
b7e516c
Kill off cpu_state_reset()
by Andreas Färber
· 13 years ago
30bf942
target-mips: Let cpu_mips_init() return MIPSCPU
by Andreas Färber
· 13 years ago
fca1be7
target-mips: Use cpu_reset() in do_interrupt()
by Andreas Färber
· 13 years ago
3bd4122
target-mips: Use cpu_reset() in cpu_mips_init()
by Andreas Färber
· 13 years ago
d7f66b5
mips: Fix BC1ANY[24]F instructions
by Richard Sandiford
· 13 years ago
bed38e4
target-mips: Remove commented-out function declaration
by Andreas Färber
· 13 years ago
b3412b0
target-mips: Remove unused inline function
by Stefan Weil
· 13 years ago
61d25e1
Merge branch 'qom-cpu-rest.v1' of git://github.com/afaerber/qemu-cpu
by Blue Swirl
· 13 years ago
5b0c40f
target-mips: Start QOM'ifying CPU init
by Andreas Färber
· 13 years ago
0f71a70
target-mips: QOM'ify CPU
by Andreas Färber
· 13 years ago
dda3c2e
target-mips: Move definition of uint_fast{8, 16}_t to osdep.h
by Andreas Färber
· 13 years ago
b69e48a
target-mips: Fix type cast for w64 (uintptr_t)
by Stefan Weil
· 13 years ago
2050396
Use uintptr_t for various op related functions
by Blue Swirl
· 13 years ago
5cbdb3a
Replace Qemu by QEMU in comments
by Stefan Weil
· 13 years ago
6576b74
Replace Qemu by QEMU in internal documentation
by Stefan Weil
· 13 years ago
59821ae
target-mips: Add compiler attribute to some functions which don't return
by Stefan Weil
· 13 years ago
9349b4f
Rename CPUState -> CPUArchState
by Andreas Färber
· 13 years ago
7db13fa
target-mips: Don't overuse CPUState
by Andreas Färber
· 13 years ago
1bba0dc
Rename cpu_reset() to cpu_state_reset()
by Andreas Färber
· 13 years ago
93148aa
Spelling fixes in comments (it's -> its)
by Stefan Weil
· 13 years ago
0056c09
target-mips: Clean includes
by Stefan Weil
· 13 years ago
e7d8100
Fix spelling in comments, documentation and messages
by Stefan Weil
· 13 years ago
4abf79a
fix spelling in target sub directory
by Dong Xu Wang
· 13 years ago
bccd9ec
softmmu_header: pass CPUState to tlb_fill
by Blue Swirl
· 14 years ago
344eecf
mips: Support the MT TCStatus IXMT irq disable flag
by Edgar E. Iglesias
· 14 years ago
f249412
mips: Add MT halting and waking of VPEs
by Edgar E. Iglesias
· 14 years ago
9e56e75
mips: Initialize MT state at reset
by Edgar E. Iglesias
· 14 years ago
1dab005
mips: Default to using one VPE and one TC.
by Edgar E. Iglesias
· 14 years ago
ded4008
mips: Enable VInt interrupt mode for the 34Kf
by Edgar E. Iglesias
· 14 years ago
e428097
mips: Correct VInt vector generation
by Edgar E. Iglesias
· 14 years ago
bc45a67
mips: Correct IntCtl write mask for VInt
by Edgar E. Iglesias
· 14 years ago
5a25ce9
mips: Hook in more reg accesses via mttr/mftr
by Edgar E. Iglesias
· 14 years ago
fe8dca8
mips: Synchronize CP0 TCSTatus, Status and EntryHi
by Edgar E. Iglesias
· 14 years ago
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