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qemu-android / qemu-android / c2cb92f9ea3c88acde6a8cb75abc148dfe27aee7 / target-arm / cpu.c
  1. eb0ecd5 target-arm: Add support for AArch32 ARMv8 CRC32 instructions by Will Newton · 11 years ago
  2. 4cc3561 target-arm: Store AIF bits in env->pstate for AArch32 by Peter Maydell · 11 years ago
  3. 8af35c3 target-arm: Implement AArch64 cache invalidate/clean ops by Peter Maydell · 11 years ago
  4. 7da845b target-arm: A64: Make cache ID registers visible to AArch64 by Peter Maydell · 11 years ago
  5. 67ed771 target-arm: Fix raw read and write functions on AArch64 registers by Peter Maydell · 11 years ago
  6. c4241c7 target-arm: Drop success/fail return from cpreg read and write functions by Peter Maydell · 11 years ago
  7. 76e3e1b target-arm: Define names for SCTLR bits by Peter Maydell · 11 years ago
  8. 51a9b04 ARM: Convert MIDR to a property by Alistair Francis · 11 years ago
  9. 133fe77 Merge remote branch 'luiz/queue/qmp' into qmpq by Edgar E. Iglesias · 11 years ago
  10. 83e6813 target-arm: Switch ARMCPUInfo arrays to use terminator entries by Peter Maydell · 11 years ago
  11. 5433a0a hw: Remove assert_no_error usages by Peter Crosthwaite · 11 years ago
  12. d356312 target-arm: Clean up handling of AArch64 PSTATE by Peter Maydell · 11 years ago
  13. 387f980 ARM: arm_cpu_reset: make it possible to use high vectors for reset_exc by Antony Pavlov · 11 years ago
  14. 68e0a40 ARM: cpu: add "reset_hivecs" property by Antony Pavlov · 11 years ago
  15. 07a5b0d target-arm/cpu: Convert reset CBAR to a property by Peter Crosthwaite · 11 years ago
  16. d8ba780 target-arm: Define and use ARM_FEATURE_CBAR by Peter Crosthwaite · 11 years ago
  17. 9d93550 target-arm: add support for v8 AES instructions by Ard Biesheuvel · 11 years ago
  18. 3541add target-arm: Don't hardcode KVM target CPU to be A15 by Peter Maydell · 11 years ago
  19. 5de1643 target-arm: Allow secondary KVM CPUs to be booted via PSCI by Peter Maydell · 11 years ago
  20. 54d3e3f target-arm: Add ARMCPU field for Linux device-tree 'compatible' string by Peter Maydell · 11 years ago
  21. 3926cc8 target-arm: Prepare translation for AArch64 code by Alexander Graf · 12 years ago
  22. 15ee776 target-arm: Disable 32 bit CPUs in 64 bit linux-user builds by Peter Maydell · 12 years ago
  23. f62cafd target-arm: fix ARMv7M stack alignment on reset by Sebastian Ottlik · 12 years ago
  24. f5f6d38 target-arm: Make '-cpu any' available in linux-user mode only by Peter Maydell · 12 years ago
  25. bc72ad6 aio / timers: Switch entire codebase to the new timer API by Alex Bligh · 12 years ago
  26. 55d284a target-arm: Implement the generic timer by Peter Maydell · 12 years ago
  27. 7c1840b target-arm: Make IRQ and FIQ gpio lines on the CPU object by Peter Maydell · 12 years ago
  28. 14a10fc cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState" by Andreas Färber · 12 years ago
  29. 5b24c64 cpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XML by Andreas Färber · 12 years ago
  30. 5b50e79 cpu: Introduce CPUClass::gdb_{read,write}_register() by Andreas Färber · 12 years ago
  31. a0e372f cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs by Andreas Färber · 12 years ago
  32. 00b941e cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook by Andreas Färber · 12 years ago
  33. f45748f cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc() by Andreas Färber · 12 years ago
  34. 81e69fb target-arm: add feature flag for ARMv8 by Mans Rullgard · 12 years ago
  35. 91b1df8 cpu: Move reset logging to CPUState by Andreas Färber · 12 years ago
  36. a076285 log: Change log_cpu_state[_mask]() argument to CPUState by Andreas Färber · 12 years ago
  37. c643bed cpu: Change qemu_init_vcpu() argument to CPUState by Andreas Färber · 12 years ago
  38. 878096e cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks by Andreas Färber · 12 years ago
  39. bdcc150 target-arm: Make LPAE feature imply V7MP by Peter Maydell · 12 years ago
  40. 721fae1 target-arm: Convert TCG to using (index,value) list for cp migration by Peter Maydell · 12 years ago
  41. 3cc1d20 target-arm: port ARM CPU save/load to use VMState by Juan Quintela · 12 years ago
  42. e6f010c target-arm: Override do_interrupt for ARMv7-M profile by Andreas Färber · 12 years ago
  43. 97a8ea5 cpu: Replace do_interrupt() by CPUClass::do_interrupt method by Andreas Färber · 12 years ago
  44. c05efcb cpu: Add CPUArchState pointer to CPUState by Andreas Färber · 12 years ago
  45. 79614b7 target-arm: Move TCG initialization to ARMCPU initfn by Andreas Färber · 12 years ago
  46. 1496926 target-arm: Update ARMCPU to QOM realizefn by Andreas Färber · 12 years ago
  47. 51492fd target-arm: Rename CPU types by Andreas Färber · 12 years ago
  48. 245fb54 target-arm: Catch attempt to instantiate abstract type in cpu_init() by Andreas Färber · 12 years ago
  49. 5900d6b target-arm: Detect attempt to instantiate non-CPU type in cpu_init() by Andreas Färber · 12 years ago
  50. 55e5c28 cpu: Move cpu_index field to CPUState by Andreas Färber · 12 years ago
  51. 918fd08 target-arm: use type_register() instead of type_register_static() by Eduardo Habkost · 12 years ago
  52. 9c17d61 softmmu: move include files to include/sysemu/ by Paolo Bonzini · 12 years ago
  53. 918f5dc target-arm: Extend feature flags to 64 bits by Peter Maydell · 13 years ago
  54. de9b05b target-arm: Implement privileged-execute-never (PXN) by Peter Maydell · 13 years ago
  55. b2d06f9 target-arm: Remove ARM_CPUID_* macros by Peter Maydell · 13 years ago
  56. 7884849 target-arm: Convert final ID registers by Peter Maydell · 13 years ago
  57. 81bdde9 target-arm: Convert MPIDR by Peter Maydell · 13 years ago
  58. 776d4e5 target-arm: Convert cp15 cache ID registers by Peter Maydell · 13 years ago
  59. 8515a09 target-arm: Convert cp15 crn=0 crm={1,2} feature registers by Peter Maydell · 13 years ago
  60. 2771db2 target-arm: Convert cp15 crn=1 registers by Peter Maydell · 13 years ago
  61. 34f9052 target-arm: Convert cp15 crn=9 registers by Peter Maydell · 13 years ago
  62. 06d76f3 target-arm: Convert cp15 crn=6 registers by Peter Maydell · 13 years ago
  63. c480421 target-arm: convert cp15 crn=7 registers by Peter Maydell · 13 years ago
  64. 1047b9d target-arm: Convert cp15 crn=15 registers by Peter Maydell · 13 years ago
  65. ecce5c3 target-arm: Convert cp15 crn=2 registers by Peter Maydell · 13 years ago
  66. 200ac0e target-arm: Convert performance monitor registers by Peter Maydell · 13 years ago
  67. 2ceb98c target-arm: Add register_cp_regs_for_features() by Peter Maydell · 13 years ago
  68. 4b6a83f target-arm: initial coprocessor register framework by Peter Maydell · 13 years ago
  69. 200bf59 target-arm: Fix 11MPCore cache type register value by Peter Maydell · 13 years ago
  70. c5fad12 target-arm: Move A9 config_base_address reset value to ARMCPU by Peter Maydell · 13 years ago
  71. 778c3a0 target-arm: Change cpu_arm_init() return type to ARMCPU by Andreas Färber · 13 years ago
  72. 3c30dd5 target-arm: Move reset handling to arm_cpu_reset by Peter Maydell · 13 years ago
  73. 85df378 target-arm: Move cache ID register setup to cpu specific init fns by Peter Maydell · 13 years ago
  74. 2e4d7e3 target-arm: Move feature register setup to per-CPU init fns by Peter Maydell · 13 years ago
  75. 0ca7e01 target-arm: Move SCTLR reset value setup to per cpu init fns by Peter Maydell · 13 years ago
  76. 64e1671 target-arm: Move CTR setup to per cpu init fns by Peter Maydell · 13 years ago
  77. bd35c35 target-arm: Move MVFR* setup to per cpu init fns by Peter Maydell · 13 years ago
  78. 325b3ce target-arm: Move FPSID config to cpu init fns by Peter Maydell · 13 years ago
  79. 581be09 target-arm: Move feature bit settings to CPU init fns by Peter Maydell · 13 years ago
  80. 777dc78 target-arm: Add QOM subclasses for each ARM cpu implementation by Peter Maydell · 13 years ago
  81. dec9c2d target-arm: Minimalistic CPU QOM'ification by Andreas Färber · 13 years ago