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qemu-android / qemu-android / dd673288a8ff73ad77fcc1c255486d2466a772e1 / target-xtensa
  1. 7ff7563 target-xtensa: fix big-endian BBS/BBC implementation by Max Filippov · 13 years ago
  2. f492b82 target-xtensa: switch to AREG0-free mode by Max Filippov · 13 years ago
  3. e8de1ea target-xtensa: add attributes to helper functions by Max Filippov · 13 years ago
  4. 9ed3a18 target-xtensa: remove unnecessary include of dyngen-exec.h by Peter Portante · 13 years ago
  5. d865f30 target-xtensa: fix CCOUNT for conditional branches by Max Filippov · 13 years ago
  6. 57705a6 target-xtensa: control page table lookup explicitly by Max Filippov · 13 years ago
  7. ae4e798 target-xtensa: update autorefill TLB entries conditionally by Max Filippov · 13 years ago
  8. 16bde77 target-xtensa: extract TLB entry setting method by Max Filippov · 13 years ago
  9. 39e7d37 target-xtensa: update EXCVADDR in case of page table lookup by Max Filippov · 13 years ago
  10. e323bde target-xtensa: flush TLB page for new MMU mapping by Max Filippov · 13 years ago
  11. fbe37ef build: move other target-*/ objects to nested Makefile.objs by Paolo Bonzini · 13 years ago
  12. 9cdc8df build: move libobj-y variable to nested Makefile.objs by Paolo Bonzini · 13 years ago
  13. 5e8861a build: move obj-TARGET-y variables to nested Makefile.objs by Paolo Bonzini · 13 years ago
  14. b7e516c Kill off cpu_state_reset() by Andreas Färber · 13 years ago
  15. 15be317 target-xtensa: Let cpu_xtensa_init() return XtensaCPU by Andreas Färber · 13 years ago
  16. b18b37f target-xtensa: fix LOOPNEZ/LOOPGTZ translation by Max Filippov · 13 years ago
  17. b79b38e target-xtensa: add license to core-fsf.c by Max Filippov · 13 years ago
  18. fbaa9fb target-xtensa: add license to core-dc232b.c by Max Filippov · 13 years ago
  19. 176ac95 target-xtensa: add dc233c core by Max Filippov · 13 years ago
  20. 3d0be8a target-xtensa: fix tb invalidation for IBREAK and LOOP by Max Filippov · 13 years ago
  21. 2050396 Use uintptr_t for various op related functions by Blue Swirl · 13 years ago
  22. e554bbc target-xtensa: Start QOM'ifying CPU init by Andreas Färber · 13 years ago
  23. 5087a72 target-xtensa: QOM'ify CPU reset by Andreas Färber · 13 years ago
  24. a4633e1 target-xtensa: QOM'ify CPU by Andreas Färber · 13 years ago
  25. 16c1dea target-xtensa: Move helpers.h to helper.h by Lluís Vilanova · 13 years ago
  26. 9349b4f Rename CPUState -> CPUArchState by Andreas Färber · 13 years ago
  27. 97129ac target-xtensa: Don't overuse CPUState by Andreas Färber · 13 years ago
  28. 1bba0dc Rename cpu_reset() to cpu_state_reset() by Andreas Färber · 13 years ago
  29. 5a30d3f Merge branch 'upstream' of git://qemu.weilnetz.de/qemu by Blue Swirl · 13 years ago
  30. 2ad5201 target-xtensa: Clean includes by Stefan Weil · 13 years ago
  31. 18da932 target-xtensa: add DEBUG_SECTION to overlay tool by Max Filippov · 13 years ago
  32. f14c4b5 target-xtensa: add DBREAK data breakpoints by Max Filippov · 13 years ago
  33. 35b5c04 target-xtensa: add ICOUNT SR and debug exception by Max Filippov · 13 years ago
  34. e61dc8f target-xtensa: implement instruction breakpoints by Max Filippov · 13 years ago
  35. ab58c5b target-xtensa: add DEBUGCAUSE SR and configuration by Max Filippov · 13 years ago
  36. a044ec2 target-xtensa: fetch 3rd opcode byte only when needed by Max Filippov · 13 years ago
  37. 692f737 target-xtensa: implement info tlb monitor command by Max Filippov · 13 years ago
  38. b96ac3e target-xtensa: define TLB_TEMPLATE for MMU-less cores by Max Filippov · 13 years ago
  39. 0fdd2e1 target-xtensa: fix MMUv3 initialization by Max Filippov · 13 years ago
  40. 6b81471 target-xtensa: raise an exception for invalid and reserved opcodes by Max Filippov · 13 years ago
  41. 0c852e1 target-xtensa: handle cache options in the overlay tool by Max Filippov · 13 years ago
  42. 53a72df target-xtensa: mask out undefined bits of WINDOWSTART SR by Max Filippov · 13 years ago
  43. 935f7a2 target-xtensa: add fsf core by Max Filippov · 13 years ago
  44. 53add75 target-xtensa: add dc232b core by Max Filippov · 13 years ago
  45. ac8b7db target-xtensa: extract core configuration from overlay by Max Filippov · 13 years ago
  46. b8929a5 target-xtensa: implement external interrupt mapping by Max Filippov · 13 years ago
  47. 63f95e4 target-xtensa: remove hand-written xtensa cores implementations by Max Filippov · 13 years ago
  48. 7f65f4b target-xtensa: increase xtensa options accuracy by Max Filippov · 13 years ago
  49. 6825b6c target-xtensa: implement MAC16 option by Max Filippov · 13 years ago
  50. 890c633 target-xtensa: fix guest hang on masked CCOMPARE interrupt by Max Filippov · 13 years ago
  51. bccd9ec softmmu_header: pass CPUState to tlb_fill by Blue Swirl · 14 years ago
  52. 47d05a8 target-xtensa: add dc232b core and board by Max Filippov · 14 years ago
  53. 4dd85b6 target-xtensa: implement boolean option by Max Filippov · 14 years ago
  54. b67ea0c target-xtensa: implement memory protection options by Max Filippov · 14 years ago
  55. ccfcaba target-xtensa: add gdb support by Max Filippov · 14 years ago
  56. 97836ce target-xtensa: implement relocatable vectors by Max Filippov · 14 years ago
  57. f3df4c0 target-xtensa: implement CPENABLE and PRID SRs by Max Filippov · 14 years ago
  58. 772177c target-xtensa: implement accurate window check by Max Filippov · 14 years ago
  59. b994e91 target-xtensa: implement interrupt option by Max Filippov · 14 years ago
  60. 1ddeaa5 target-xtensa: implement SIMCALL by Max Filippov · 14 years ago
  61. 5b4e481 target-xtensa: implement unaligned exception option by Max Filippov · 14 years ago
  62. 6ad6dbf target-xtensa: implement extended L32R by Max Filippov · 14 years ago
  63. 797d780 target-xtensa: implement loop option by Max Filippov · 14 years ago
  64. 553e44f target-xtensa: implement windowed registers by Max Filippov · 14 years ago
  65. f76ebf5 target-xtensa: implement RST2 group (32 bit mul/div/rem) by Max Filippov · 14 years ago
  66. 40643d7 target-xtensa: implement exceptions by Max Filippov · 14 years ago
  67. f0a548b target-xtensa: add PS register and access control by Max Filippov · 14 years ago
  68. 8ffc2d0 target-xtensa: implement CACHE group by Max Filippov · 14 years ago
  69. 28067b2 target-xtensa: implement SYNC group by Max Filippov · 14 years ago
  70. 91a5bb7 target-xtensa: mark reserved and TBD opcodes by Max Filippov · 14 years ago
  71. 809377a target-xtensa: implement LSAI group by Max Filippov · 14 years ago
  72. 3580eca target-xtensa: implement shifts (ST1 and RST1 groups) by Max Filippov · 14 years ago
  73. b8132ef target-xtensa: implement RST3 group by Max Filippov · 14 years ago
  74. 2af3da9 target-xtensa: add special and user registers by Max Filippov · 14 years ago
  75. 5da4a6a target-xtensa: implement JX/RET0/CALLX by Max Filippov · 14 years ago
  76. bd57fb9 target-xtensa: implement conditional jumps by Max Filippov · 14 years ago
  77. f331fe5 target-xtensa: implement RT0 group by Max Filippov · 14 years ago
  78. 67882fd target-xtensa: implement narrow instructions by Max Filippov · 14 years ago
  79. dedc5ea target-xtensa: implement disas_xtensa_insn by Max Filippov · 14 years ago
  80. 2328826 target-xtensa: add target stubs by Max Filippov · 14 years ago