commit 5816488abfb06425365999d0e1296a56440e4636
author David 'Digit' Turner <digit@google.com> Tue Apr 15 21:46:32 2014 +0200
committer David 'Digit' Turner <digit@google.com> Fri Jul 18 15:31:40 2014 +0200
tree 2366426e01890b849af114cfebc06a7c29c4a90f
parent 2c16417b6306203c6aaee4867e5e2d2d97ba72a8

hw/core/dma.c: Convert to VMStateDescription.

Change-Id: Ic1687602a077ba9c8e38c68ad2c4d3b6abe11453

hw/core/dma.c

diff --git a/hw/core/dma.c b/hw/core/dma.c
index 5a7d874..2c38b59 100644
--- a/hw/core/dma.c
+++ b/hw/core/dma.c
@@ -504,84 +504,55 @@
     }
 }
 
-static void dma_save (QEMUFile *f, void *opaque)
-{
-    struct dma_cont *d = opaque;
-    int i;
-
-    /* qemu_put_8s (f, &d->status); */
-    qemu_put_8s (f, &d->command);
-    qemu_put_8s (f, &d->mask);
-    qemu_put_8s (f, &d->flip_flop);
-    qemu_put_be32 (f, d->dshift);
-
-    for (i = 0; i < 4; ++i) {
-        struct dma_regs *r = &d->regs[i];
-        qemu_put_be32 (f, r->now[0]);
-        qemu_put_be32 (f, r->now[1]);
-        qemu_put_be16s (f, &r->base[0]);
-        qemu_put_be16s (f, &r->base[1]);
-        qemu_put_8s (f, &r->mode);
-        qemu_put_8s (f, &r->page);
-        qemu_put_8s (f, &r->pageh);
-        qemu_put_8s (f, &r->dack);
-        qemu_put_8s (f, &r->eop);
+static const VMStateDescription vmstate_dma_regs = {
+    .name = "dma_regs",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .minimum_version_id_old = 1,
+    .fields      = (VMStateField []) {
+        VMSTATE_INT32_ARRAY(now, struct dma_regs, 2),
+        VMSTATE_UINT16_ARRAY(base, struct dma_regs, 2),
+        VMSTATE_UINT8(mode, struct dma_regs),
+        VMSTATE_UINT8(page, struct dma_regs),
+        VMSTATE_UINT8(pageh, struct dma_regs),
+        VMSTATE_UINT8(dack, struct dma_regs),
+        VMSTATE_UINT8(eop, struct dma_regs),
+        VMSTATE_END_OF_LIST()
     }
-}
+};
 
-static int dma_load (QEMUFile *f, void *opaque, int version_id)
+static int dma_post_load(void *opaque, int version_id)
 {
-    struct dma_cont *d = opaque;
-    int i;
-
-    if (version_id != 1)
-        return -EINVAL;
-
-    /* qemu_get_8s (f, &d->status); */
-    qemu_get_8s (f, &d->command);
-    qemu_get_8s (f, &d->mask);
-    qemu_get_8s (f, &d->flip_flop);
-    d->dshift=qemu_get_be32 (f);
-
-    for (i = 0; i < 4; ++i) {
-        struct dma_regs *r = &d->regs[i];
-        r->now[0]=qemu_get_be32 (f);
-        r->now[1]=qemu_get_be32 (f);
-        qemu_get_be16s (f, &r->base[0]);
-        qemu_get_be16s (f, &r->base[1]);
-        qemu_get_8s (f, &r->mode);
-        qemu_get_8s (f, &r->page);
-        qemu_get_8s (f, &r->pageh);
-        qemu_get_8s (f, &r->dack);
-        qemu_get_8s (f, &r->eop);
-    }
-
     DMA_run();
 
     return 0;
 }
 
+static const VMStateDescription vmstate_dma = {
+    .name = "dma",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .minimum_version_id_old = 1,
+    .post_load = dma_post_load,
+    .fields      = (VMStateField []) {
+        VMSTATE_UINT8(command, struct dma_cont),
+        VMSTATE_UINT8(mask, struct dma_cont),
+        VMSTATE_UINT8(flip_flop, struct dma_cont),
+        VMSTATE_INT32(dshift, struct dma_cont),
+        VMSTATE_STRUCT_ARRAY(regs, struct dma_cont, 4, 1, vmstate_dma_regs, struct dma_regs),
+        VMSTATE_END_OF_LIST()
+    }
+};
+
 void DMA_init (int high_page_enable)
 {
     dma_init2(&dma_controllers[0], 0x00, 0, 0x80,
               high_page_enable ? 0x480 : -1);
     dma_init2(&dma_controllers[1], 0xc0, 1, 0x88,
               high_page_enable ? 0x488 : -1);
-    register_savevm(NULL,
-                    "dma",
-                    0,
-                    1,
-                    dma_save,
-                    dma_load,
-                    &dma_controllers[0]);
 
-    register_savevm(NULL,
-                    "dma",
-                    1,
-                    1,
-                    dma_save,
-                    dma_load,
-                    &dma_controllers[1]);
+    vmstate_register (NULL, 0, &vmstate_dma, &dma_controllers[0]);
+    vmstate_register (NULL, 1, &vmstate_dma, &dma_controllers[1]);
 
     dma_bh = qemu_bh_new(DMA_run_bh, NULL);
 }