commit | 1f944c661a821774e7b8cfbf5560a238795f2a60 | [log] [tgz] |
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author | Michael S. Tsirkin <mst@redhat.com> | Wed Nov 25 12:00:10 2009 +0200 |
committer | Michael S. Tsirkin <mst@redhat.com> | Tue Dec 01 18:00:00 2009 +0200 |
tree | 5665679277dac50aaa9eaedf025a1ca954ab38fc | |
parent | ae1be0bbc127a9a6289873efdb7cb22c57d81a9d [diff] |
msix: fix reset value for enable bit On reset, we currently clear all bits in msix control register *except* enable bit. This is wrong: the spec says we should clear writeable bits: function mask and enable bit. Correct this. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>