target-ppc: fix TCGv type in fcmpu/fcmpo Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6044 c046a42c-6fe2-441c-8c8c-71466251a162
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 4c4f9ef..a0b69c4 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c
@@ -2249,7 +2249,7 @@ /* fcmpo */ GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT) { - TCGv crf; + TCGv_i32 crf; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; @@ -2257,14 +2257,14 @@ gen_reset_fpstatus(); crf = tcg_const_i32(crfD(ctx->opcode)); gen_helper_fcmpo(cpu_fpr[rA(ctx->opcode)], cpu_fpr[rB(ctx->opcode)], crf); - tcg_temp_free(crf); + tcg_temp_free_i32(crf); gen_helper_float_check_status(); } /* fcmpu */ GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT) { - TCGv crf; + TCGv_i32 crf; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; @@ -2272,7 +2272,7 @@ gen_reset_fpstatus(); crf = tcg_const_i32(crfD(ctx->opcode)); gen_helper_fcmpu(cpu_fpr[rA(ctx->opcode)], cpu_fpr[rB(ctx->opcode)], crf); - tcg_temp_free(crf); + tcg_temp_free_i32(crf); gen_helper_float_check_status(); }