tcg: Move helper registration into tcg_context_init No longer needs to be done on a per-target basis. Signed-off-by: Richard Henderson <rth@twiddle.net>
diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 28ce436..9cb8084 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c
@@ -140,10 +140,6 @@ offsetof(CPUAlphaState, usp), "usp"); #endif - /* register helpers */ -#define GEN_HELPER 2 -#include "helper.h" - done_init = 1; }
diff --git a/target-arm/translate.c b/target-arm/translate.c index 998bde2..5f003e7 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c
@@ -115,9 +115,6 @@ #endif a64_translate_init(); - -#define GEN_HELPER 2 -#include "helper.h" } static inline TCGv_i32 load_cpu_offset(int offset)
diff --git a/target-cris/translate.c b/target-cris/translate.c index 617e1b4..5faa44c 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c
@@ -3480,9 +3480,6 @@ { int i; -#define GEN_HELPER 2 -#include "helper.h" - cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); cc_x = tcg_global_mem_new(TCG_AREG0, offsetof(CPUCRISState, cc_x), "cc_x");
diff --git a/target-i386/translate.c b/target-i386/translate.c index be74ebc..eb0ea93 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c
@@ -8261,10 +8261,6 @@ cpu_regs[R_EDI] = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUX86State, regs[R_EDI]), "edi"); #endif - - /* register helpers */ -#define GEN_HELPER 2 -#include "helper.h" } /* generate intermediate code in gen_opc_buf and gen_opparam_buf for
diff --git a/target-m68k/translate.c b/target-m68k/translate.c index f31e48d..f54b94a 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c
@@ -108,9 +108,6 @@ NULL_QREG = tcg_global_mem_new(TCG_AREG0, -4, "NULL"); store_dummy = tcg_global_mem_new(TCG_AREG0, -8, "NULL"); - -#define GEN_HELPER 2 -#include "helper.h" } static inline void qemu_assert(int cond, const char *msg)
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 0673176..1b937b3 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c
@@ -2024,8 +2024,6 @@ offsetof(CPUMBState, sregs[i]), special_regnames[i]); } -#define GEN_HELPER 2 -#include "helper.h" } void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb, int pc_pos)
diff --git a/target-mips/translate.c b/target-mips/translate.c index ad43d59..0d8db66 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c
@@ -15886,10 +15886,6 @@ offsetof(CPUMIPSState, active_fpu.fcr31), "fcr31"); - /* register helpers */ -#define GEN_HELPER 2 -#include "helper.h" - inited = 1; }
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index 723b77d..8908a2e 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c
@@ -110,8 +110,6 @@ offsetof(CPUOpenRISCState, gpr[i]), regnames[i]); } -#define GEN_HELPER 2 -#include "helper.h" } /* Writeback SR_F transaltion-space to execution-space. */
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 9c59f69..66c7771 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c
@@ -175,10 +175,6 @@ cpu_access_type = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUPPCState, access_type), "access_type"); - /* register helpers */ -#define GEN_HELPER 2 -#include "helper.h" - done_init = 1; }
diff --git a/target-s390x/translate.c b/target-s390x/translate.c index afe90eb..bc99a37 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c
@@ -188,10 +188,6 @@ offsetof(CPUS390XState, fregs[i].d), cpu_reg_names[i + 16]); } - - /* register helpers */ -#define GEN_HELPER 2 -#include "helper.h" } static TCGv_i64 load_reg(int reg)
diff --git a/target-sh4/translate.c b/target-sh4/translate.c index c06b29f..2272eb0 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c
@@ -143,10 +143,6 @@ offsetof(CPUSH4State, fregs[i]), fregnames[i]); - /* register helpers */ -#define GEN_HELPER 2 -#include "helper.h" - done_init = 1; }
diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 36615f1..dce64c3 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c
@@ -5456,11 +5456,6 @@ offsetof(CPUSPARCState, fpr[i]), fregnames[i]); } - - /* register helpers */ - -#define GEN_HELPER 2 -#include "helper.h" } }
diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c index 1246895..4572890 100644 --- a/target-unicore32/translate.c +++ b/target-unicore32/translate.c
@@ -74,9 +74,6 @@ cpu_R[i] = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUUniCore32State, regs[i]), regnames[i]); } - -#define GEN_HELPER 2 -#include "helper.h" } static int num_temps;
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index 24343bd..06641bb 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c
@@ -238,8 +238,6 @@ uregnames[i].name); } } -#define GEN_HELPER 2 -#include "helper.h" } static inline bool option_bits_enabled(DisasContext *dc, uint64_t opt)
diff --git a/tcg/tcg.c b/tcg/tcg.c index 9cd5c38..d3ac5fd 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c
@@ -254,6 +254,8 @@ s->pool_current = NULL; } +#include "helper.h" + void tcg_context_init(TCGContext *s) { int op, total_args, n; @@ -284,7 +286,11 @@ sorted_args += n; args_ct += n; } - + + /* Register helpers. */ +#define GEN_HELPER 2 +#include "helper.h" + tcg_target_init(s); }