target-i386/kvm: Hyper-V HV_X64_MSR_RESET support

HV_X64_MSR_RESET msr is used by Hyper-V based Windows guest
to reset guest VM by hypervisor. This msr is stateless so
no migration/fetch/update is required.

This code checks cpu option "hv-reset" and support by
kernel. If both conditions are met appropriate Hyper-V features
cpuid bit is set.

Signed-off-by: Andrey Smetanin <asmetanin@virtuozzo.com>
Signed-off-by: Denis V. Lunev <den@openvz.org>
CC: Paolo Bonzini <pbonzini@redhat.com>
CC: Richard Henderson <rth@twiddle.net>
CC: Eduardo Habkost <ehabkost@redhat.com>
CC: "Andreas Färber" <afaerber@suse.de>
CC: Marcelo Tosatti <mtosatti@redhat.com>
Message-Id: <1442397584-16698-2-git-send-email-den@openvz.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

target-i386/cpu-qom.h

diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h
index c35b624..ed8fd18 100644
--- a/target-i386/cpu-qom.h
+++ b/target-i386/cpu-qom.h
@@ -90,6 +90,7 @@
     int hyperv_spinlock_attempts;
     bool hyperv_time;
     bool hyperv_crash;
+    bool hyperv_reset;
     bool check_cpuid;
     bool enforce_cpuid;
     bool expose_kvm;

target-i386/cpu.c

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 05d7f26..230ecf4 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -3140,6 +3140,7 @@
     DEFINE_PROP_BOOL("hv-vapic", X86CPU, hyperv_vapic, false),
     DEFINE_PROP_BOOL("hv-time", X86CPU, hyperv_time, false),
     DEFINE_PROP_BOOL("hv-crash", X86CPU, hyperv_crash, false),
+    DEFINE_PROP_BOOL("hv-reset", X86CPU, hyperv_reset, false),
     DEFINE_PROP_BOOL("check", X86CPU, check_cpuid, false),
     DEFINE_PROP_BOOL("enforce", X86CPU, enforce_cpuid, false),
     DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true),

target-i386/kvm.c

diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 80d1a7e..401a2f3 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -82,6 +82,7 @@
 static bool has_msr_hv_vapic;
 static bool has_msr_hv_tsc;
 static bool has_msr_hv_crash;
+static bool has_msr_hv_reset;
 static bool has_msr_mtrr;
 static bool has_msr_xss;
 
@@ -460,7 +461,8 @@
            (hyperv_hypercall_available(cpu) ||
             cpu->hyperv_time  ||
             cpu->hyperv_relaxed_timing ||
-            cpu->hyperv_crash);
+            cpu->hyperv_crash ||
+            cpu->hyperv_reset);
 }
 
 static Error *invtsc_mig_blocker;
@@ -529,7 +531,9 @@
         if (cpu->hyperv_crash && has_msr_hv_crash) {
             c->edx |= HV_X64_GUEST_CRASH_MSR_AVAILABLE;
         }
-
+        if (cpu->hyperv_reset && has_msr_hv_reset) {
+            c->eax |= HV_X64_MSR_RESET_AVAILABLE;
+        }
         c = &cpuid_data.entries[cpuid_i++];
         c->function = HYPERV_CPUID_ENLIGHTMENT_INFO;
         if (cpu->hyperv_relaxed_timing) {
@@ -858,6 +862,10 @@
                     has_msr_hv_crash = true;
                     continue;
                 }
+                if (kvm_msr_list->indices[i] == HV_X64_MSR_RESET) {
+                    has_msr_hv_reset = true;
+                    continue;
+                }
             }
         }