xilinx_spips: Generalised to model QSPI Extended the xilinx spips controller to model QSPI as well. Paremeterised the operational difference with the normal spi controller (num_ss_bits, width of the tx/rx fifo heads etc.). Multiple bus functionality is modelled (needed for QSPI dual parallel mode. LQSPI is modelled. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>