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bellardd19893d2003-06-15 19:58:51 +00001/*
2 * Host code generation
ths5fafdf22007-09-16 21:08:06 +00003 *
bellardd19893d2003-06-15 19:58:51 +00004 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
Blue Swirl8167ee82009-07-16 20:47:01 +000017 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
bellardd19893d2003-06-15 19:58:51 +000018 */
19#include <stdarg.h>
20#include <stdlib.h>
21#include <stdio.h>
22#include <string.h>
23#include <inttypes.h>
24
25#include "config.h"
bellard20543962003-06-15 23:28:43 +000026
bellardaf5ad102004-01-04 23:28:12 +000027#define NO_CPU_IO_DEFS
bellardd3eead22003-09-30 20:59:51 +000028#include "cpu.h"
29#include "exec-all.h"
bellardd19893d2003-06-15 19:58:51 +000030#include "disas.h"
bellard57fec1f2008-02-01 10:50:11 +000031#include "tcg.h"
bellardd19893d2003-06-15 19:58:51 +000032
bellard57fec1f2008-02-01 10:50:11 +000033/* code generation context */
34TCGContext tcg_ctx;
bellardd19893d2003-06-15 19:58:51 +000035
bellardd19893d2003-06-15 19:58:51 +000036uint16_t gen_opc_buf[OPC_BUF_SIZE];
bellard57fec1f2008-02-01 10:50:11 +000037TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
bellardc4687872005-01-03 23:44:44 +000038
39target_ulong gen_opc_pc[OPC_BUF_SIZE];
pbrook2e70f6e2008-06-29 01:03:05 +000040uint16_t gen_opc_icount[OPC_BUF_SIZE];
bellardd19893d2003-06-15 19:58:51 +000041uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
bellardf76af4b2003-06-24 13:21:23 +000042#if defined(TARGET_I386)
43uint8_t gen_opc_cc_op[OPC_BUF_SIZE];
bellarde95c8d52004-09-30 22:22:08 +000044#elif defined(TARGET_SPARC)
bellardc4687872005-01-03 23:44:44 +000045target_ulong gen_opc_npc[OPC_BUF_SIZE];
bellardc3278b72005-03-20 12:43:29 +000046target_ulong gen_opc_jump_pc[2];
ths823029f2007-12-02 06:10:04 +000047#elif defined(TARGET_MIPS) || defined(TARGET_SH4)
bellard30d6cb82005-12-05 19:56:07 +000048uint32_t gen_opc_hflags[OPC_BUF_SIZE];
bellardf76af4b2003-06-24 13:21:23 +000049#endif
bellardd19893d2003-06-15 19:58:51 +000050
bellard57fec1f2008-02-01 10:50:11 +000051/* XXX: suppress that */
blueswir1d07bde82007-12-11 19:35:45 +000052unsigned long code_gen_max_block_size(void)
53{
54 static unsigned long max;
55
56 if (max == 0) {
pbrooka208e542008-03-31 17:07:36 +000057 max = TCG_MAX_OP_SIZE;
blueswir1d07bde82007-12-11 19:35:45 +000058#define DEF(s, n, copy_size) max = copy_size > max? copy_size : max;
bellard57fec1f2008-02-01 10:50:11 +000059#include "tcg-opc.h"
blueswir1d07bde82007-12-11 19:35:45 +000060#undef DEF
61 max *= OPC_MAX_SIZE;
62 }
63
64 return max;
65}
66
bellard57fec1f2008-02-01 10:50:11 +000067void cpu_gen_init(void)
68{
69 tcg_context_init(&tcg_ctx);
70 tcg_set_frame(&tcg_ctx, TCG_AREG0, offsetof(CPUState, temp_buf),
blueswir1a20e31d2008-04-08 19:29:54 +000071 CPU_TEMP_BUF_NLONGS * sizeof(long));
bellard57fec1f2008-02-01 10:50:11 +000072}
73
bellardd19893d2003-06-15 19:58:51 +000074/* return non zero if the very first instruction is invalid so that
ths5fafdf22007-09-16 21:08:06 +000075 the virtual CPU can trigger an exception.
bellardd19893d2003-06-15 19:58:51 +000076
77 '*gen_code_size_ptr' contains the size of the generated code (host
78 code).
79*/
blueswir1d07bde82007-12-11 19:35:45 +000080int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr)
bellardd19893d2003-06-15 19:58:51 +000081{
bellard57fec1f2008-02-01 10:50:11 +000082 TCGContext *s = &tcg_ctx;
bellardd19893d2003-06-15 19:58:51 +000083 uint8_t *gen_code_buf;
84 int gen_code_size;
bellard57fec1f2008-02-01 10:50:11 +000085#ifdef CONFIG_PROFILER
86 int64_t ti;
87#endif
88
89#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +000090 s->tb_count1++; /* includes aborted translations because of
91 exceptions */
bellard57fec1f2008-02-01 10:50:11 +000092 ti = profile_getclock();
93#endif
94 tcg_func_start(s);
bellardd19893d2003-06-15 19:58:51 +000095
ths2cfc5f12008-07-18 18:01:29 +000096 gen_intermediate_code(env, tb);
97
bellardec6338b2007-11-08 14:25:03 +000098 /* generate machine code */
bellard57fec1f2008-02-01 10:50:11 +000099 gen_code_buf = tb->tc_ptr;
bellardec6338b2007-11-08 14:25:03 +0000100 tb->tb_next_offset[0] = 0xffff;
101 tb->tb_next_offset[1] = 0xffff;
bellard57fec1f2008-02-01 10:50:11 +0000102 s->tb_next_offset = tb->tb_next_offset;
bellard4cbb86e2003-09-17 22:53:29 +0000103#ifdef USE_DIRECT_JUMP
bellard57fec1f2008-02-01 10:50:11 +0000104 s->tb_jmp_offset = tb->tb_jmp_offset;
105 s->tb_next = NULL;
bellardec6338b2007-11-08 14:25:03 +0000106 /* the following two entries are optional (only used for string ops) */
bellard57fec1f2008-02-01 10:50:11 +0000107 /* XXX: not used ? */
bellardec6338b2007-11-08 14:25:03 +0000108 tb->tb_jmp_offset[2] = 0xffff;
109 tb->tb_jmp_offset[3] = 0xffff;
bellardd19893d2003-06-15 19:58:51 +0000110#else
bellard57fec1f2008-02-01 10:50:11 +0000111 s->tb_jmp_offset = NULL;
112 s->tb_next = tb->tb_next;
bellardd19893d2003-06-15 19:58:51 +0000113#endif
bellard57fec1f2008-02-01 10:50:11 +0000114
115#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +0000116 s->tb_count++;
117 s->interm_time += profile_getclock() - ti;
118 s->code_time -= profile_getclock();
bellard57fec1f2008-02-01 10:50:11 +0000119#endif
aurel3254604f72008-12-07 20:35:00 +0000120 gen_code_size = tcg_gen_code(s, gen_code_buf);
bellardd19893d2003-06-15 19:58:51 +0000121 *gen_code_size_ptr = gen_code_size;
bellard57fec1f2008-02-01 10:50:11 +0000122#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +0000123 s->code_time += profile_getclock();
124 s->code_in_len += tb->size;
125 s->code_out_len += gen_code_size;
bellard57fec1f2008-02-01 10:50:11 +0000126#endif
127
bellardd19893d2003-06-15 19:58:51 +0000128#ifdef DEBUG_DISAS
aliguori8fec2b82009-01-15 22:36:53 +0000129 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
aliguori93fcfe32009-01-15 22:34:14 +0000130 qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr);
131 log_disas(tb->tc_ptr, *gen_code_size_ptr);
132 qemu_log("\n");
aliguori31b1a7b2009-01-15 22:35:09 +0000133 qemu_log_flush();
bellardd19893d2003-06-15 19:58:51 +0000134 }
135#endif
136 return 0;
137}
138
ths5fafdf22007-09-16 21:08:06 +0000139/* The cpu state corresponding to 'searched_pc' is restored.
bellardd19893d2003-06-15 19:58:51 +0000140 */
ths5fafdf22007-09-16 21:08:06 +0000141int cpu_restore_state(TranslationBlock *tb,
bellard58fe2f12004-02-16 22:11:32 +0000142 CPUState *env, unsigned long searched_pc,
143 void *puc)
bellardd19893d2003-06-15 19:58:51 +0000144{
bellard57fec1f2008-02-01 10:50:11 +0000145 TCGContext *s = &tcg_ctx;
146 int j;
bellardd19893d2003-06-15 19:58:51 +0000147 unsigned long tc_ptr;
bellard57fec1f2008-02-01 10:50:11 +0000148#ifdef CONFIG_PROFILER
149 int64_t ti;
150#endif
151
152#ifdef CONFIG_PROFILER
153 ti = profile_getclock();
154#endif
155 tcg_func_start(s);
bellardd19893d2003-06-15 19:58:51 +0000156
ths2cfc5f12008-07-18 18:01:29 +0000157 gen_intermediate_code_pc(env, tb);
ths3b46e622007-09-17 08:09:54 +0000158
pbrook2e70f6e2008-06-29 01:03:05 +0000159 if (use_icount) {
160 /* Reset the cycle counter to the start of the block. */
161 env->icount_decr.u16.low += tb->icount;
162 /* Clear the IO flag. */
163 env->can_do_io = 0;
164 }
165
bellardd19893d2003-06-15 19:58:51 +0000166 /* find opc index corresponding to search_pc */
167 tc_ptr = (unsigned long)tb->tc_ptr;
168 if (searched_pc < tc_ptr)
169 return -1;
bellard57fec1f2008-02-01 10:50:11 +0000170
171 s->tb_next_offset = tb->tb_next_offset;
172#ifdef USE_DIRECT_JUMP
173 s->tb_jmp_offset = tb->tb_jmp_offset;
174 s->tb_next = NULL;
175#else
176 s->tb_jmp_offset = NULL;
177 s->tb_next = tb->tb_next;
178#endif
aurel3254604f72008-12-07 20:35:00 +0000179 j = tcg_gen_code_search_pc(s, (uint8_t *)tc_ptr, searched_pc - tc_ptr);
bellard57fec1f2008-02-01 10:50:11 +0000180 if (j < 0)
181 return -1;
bellardd19893d2003-06-15 19:58:51 +0000182 /* now find start of instruction before */
183 while (gen_opc_instr_start[j] == 0)
184 j--;
pbrook2e70f6e2008-06-29 01:03:05 +0000185 env->icount_decr.u16.low -= gen_opc_icount[j];
ths3b46e622007-09-17 08:09:54 +0000186
aurel32d2856f12008-04-28 00:32:32 +0000187 gen_pc_load(env, tb, searched_pc, j, puc);
bellard57fec1f2008-02-01 10:50:11 +0000188
189#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +0000190 s->restore_time += profile_getclock() - ti;
191 s->restore_count++;
bellard57fec1f2008-02-01 10:50:11 +0000192#endif
bellardd19893d2003-06-15 19:58:51 +0000193 return 0;
194}