bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 1 | /* General "disassemble this chunk" code. Used for debugging. */ |
bellard | 5bbe929 | 2003-06-09 19:38:38 +0000 | [diff] [blame] | 2 | #include "config.h" |
Peter Crosthwaite | 37b9de4 | 2015-06-23 20:57:33 -0700 | [diff] [blame] | 3 | #include "qemu-common.h" |
Paolo Bonzini | 76cad71 | 2012-10-24 11:12:21 +0200 | [diff] [blame] | 4 | #include "disas/bfd.h" |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 5 | #include "elf.h" |
bellard | aa0aa4f | 2003-06-09 15:23:31 +0000 | [diff] [blame] | 6 | #include <errno.h> |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 7 | |
bellard | c6105c0 | 2003-10-27 21:13:58 +0000 | [diff] [blame] | 8 | #include "cpu.h" |
Paolo Bonzini | 76cad71 | 2012-10-24 11:12:21 +0200 | [diff] [blame] | 9 | #include "disas/disas.h" |
bellard | c6105c0 | 2003-10-27 21:13:58 +0000 | [diff] [blame] | 10 | |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 11 | typedef struct CPUDebug { |
| 12 | struct disassemble_info info; |
Peter Crosthwaite | d49190c | 2015-05-24 14:20:41 -0700 | [diff] [blame] | 13 | CPUState *cpu; |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 14 | } CPUDebug; |
| 15 | |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 16 | /* Filled in by elfload.c. Simplistic, but will do for now. */ |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 17 | struct syminfo *syminfos = NULL; |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 18 | |
bellard | aa0aa4f | 2003-06-09 15:23:31 +0000 | [diff] [blame] | 19 | /* Get LENGTH bytes from info's buffer, at target address memaddr. |
| 20 | Transfer them to myaddr. */ |
| 21 | int |
pbrook | 3a742b7 | 2008-10-22 15:55:18 +0000 | [diff] [blame] | 22 | buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length, |
| 23 | struct disassemble_info *info) |
bellard | aa0aa4f | 2003-06-09 15:23:31 +0000 | [diff] [blame] | 24 | { |
bellard | c6105c0 | 2003-10-27 21:13:58 +0000 | [diff] [blame] | 25 | if (memaddr < info->buffer_vma |
| 26 | || memaddr + length > info->buffer_vma + info->buffer_length) |
| 27 | /* Out of bounds. Use EIO because GDB uses it. */ |
| 28 | return EIO; |
| 29 | memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length); |
| 30 | return 0; |
bellard | aa0aa4f | 2003-06-09 15:23:31 +0000 | [diff] [blame] | 31 | } |
| 32 | |
bellard | c6105c0 | 2003-10-27 21:13:58 +0000 | [diff] [blame] | 33 | /* Get LENGTH bytes from info's buffer, at target address memaddr. |
| 34 | Transfer them to myaddr. */ |
| 35 | static int |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 36 | target_read_memory (bfd_vma memaddr, |
| 37 | bfd_byte *myaddr, |
| 38 | int length, |
| 39 | struct disassemble_info *info) |
bellard | c6105c0 | 2003-10-27 21:13:58 +0000 | [diff] [blame] | 40 | { |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 41 | CPUDebug *s = container_of(info, CPUDebug, info); |
| 42 | |
Peter Crosthwaite | d49190c | 2015-05-24 14:20:41 -0700 | [diff] [blame] | 43 | cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0); |
bellard | c6105c0 | 2003-10-27 21:13:58 +0000 | [diff] [blame] | 44 | return 0; |
| 45 | } |
bellard | c6105c0 | 2003-10-27 21:13:58 +0000 | [diff] [blame] | 46 | |
bellard | aa0aa4f | 2003-06-09 15:23:31 +0000 | [diff] [blame] | 47 | /* Print an error message. We can assume that this is in response to |
| 48 | an error return from buffer_read_memory. */ |
| 49 | void |
pbrook | 3a742b7 | 2008-10-22 15:55:18 +0000 | [diff] [blame] | 50 | perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info) |
bellard | aa0aa4f | 2003-06-09 15:23:31 +0000 | [diff] [blame] | 51 | { |
| 52 | if (status != EIO) |
| 53 | /* Can't happen. */ |
| 54 | (*info->fprintf_func) (info->stream, "Unknown error %d\n", status); |
| 55 | else |
| 56 | /* Actually, address between memaddr and memaddr + len was |
| 57 | out of bounds. */ |
| 58 | (*info->fprintf_func) (info->stream, |
bellard | 26a7646 | 2006-06-25 18:15:32 +0000 | [diff] [blame] | 59 | "Address 0x%" PRIx64 " is out of bounds.\n", memaddr); |
bellard | aa0aa4f | 2003-06-09 15:23:31 +0000 | [diff] [blame] | 60 | } |
| 61 | |
Jim Meyering | a31f053 | 2012-05-09 05:12:04 +0000 | [diff] [blame] | 62 | /* This could be in a separate file, to save minuscule amounts of space |
bellard | aa0aa4f | 2003-06-09 15:23:31 +0000 | [diff] [blame] | 63 | in statically linked executables. */ |
| 64 | |
| 65 | /* Just print the address is hex. This is included for completeness even |
| 66 | though both GDB and objdump provide their own (to print symbolic |
| 67 | addresses). */ |
| 68 | |
| 69 | void |
pbrook | 3a742b7 | 2008-10-22 15:55:18 +0000 | [diff] [blame] | 70 | generic_print_address (bfd_vma addr, struct disassemble_info *info) |
bellard | aa0aa4f | 2003-06-09 15:23:31 +0000 | [diff] [blame] | 71 | { |
bellard | 26a7646 | 2006-06-25 18:15:32 +0000 | [diff] [blame] | 72 | (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr); |
bellard | aa0aa4f | 2003-06-09 15:23:31 +0000 | [diff] [blame] | 73 | } |
| 74 | |
Peter Maydell | 636bd28 | 2012-06-25 04:55:55 +0000 | [diff] [blame] | 75 | /* Print address in hex, truncated to the width of a host virtual address. */ |
| 76 | static void |
| 77 | generic_print_host_address(bfd_vma addr, struct disassemble_info *info) |
| 78 | { |
| 79 | uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8)); |
| 80 | generic_print_address(addr & mask, info); |
| 81 | } |
| 82 | |
bellard | aa0aa4f | 2003-06-09 15:23:31 +0000 | [diff] [blame] | 83 | /* Just return the given address. */ |
| 84 | |
| 85 | int |
pbrook | 3a742b7 | 2008-10-22 15:55:18 +0000 | [diff] [blame] | 86 | generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info) |
bellard | aa0aa4f | 2003-06-09 15:23:31 +0000 | [diff] [blame] | 87 | { |
| 88 | return 1; |
| 89 | } |
| 90 | |
Aurelien Jarno | 903ec55 | 2010-03-29 02:12:51 +0200 | [diff] [blame] | 91 | bfd_vma bfd_getl64 (const bfd_byte *addr) |
| 92 | { |
| 93 | unsigned long long v; |
| 94 | |
| 95 | v = (unsigned long long) addr[0]; |
| 96 | v |= (unsigned long long) addr[1] << 8; |
| 97 | v |= (unsigned long long) addr[2] << 16; |
| 98 | v |= (unsigned long long) addr[3] << 24; |
| 99 | v |= (unsigned long long) addr[4] << 32; |
| 100 | v |= (unsigned long long) addr[5] << 40; |
| 101 | v |= (unsigned long long) addr[6] << 48; |
| 102 | v |= (unsigned long long) addr[7] << 56; |
| 103 | return (bfd_vma) v; |
| 104 | } |
| 105 | |
bellard | aa0aa4f | 2003-06-09 15:23:31 +0000 | [diff] [blame] | 106 | bfd_vma bfd_getl32 (const bfd_byte *addr) |
| 107 | { |
| 108 | unsigned long v; |
| 109 | |
| 110 | v = (unsigned long) addr[0]; |
| 111 | v |= (unsigned long) addr[1] << 8; |
| 112 | v |= (unsigned long) addr[2] << 16; |
| 113 | v |= (unsigned long) addr[3] << 24; |
| 114 | return (bfd_vma) v; |
| 115 | } |
| 116 | |
| 117 | bfd_vma bfd_getb32 (const bfd_byte *addr) |
| 118 | { |
| 119 | unsigned long v; |
| 120 | |
| 121 | v = (unsigned long) addr[0] << 24; |
| 122 | v |= (unsigned long) addr[1] << 16; |
| 123 | v |= (unsigned long) addr[2] << 8; |
| 124 | v |= (unsigned long) addr[3]; |
| 125 | return (bfd_vma) v; |
| 126 | } |
| 127 | |
bellard | 6af0bf9 | 2005-07-02 14:58:51 +0000 | [diff] [blame] | 128 | bfd_vma bfd_getl16 (const bfd_byte *addr) |
| 129 | { |
| 130 | unsigned long v; |
| 131 | |
| 132 | v = (unsigned long) addr[0]; |
| 133 | v |= (unsigned long) addr[1] << 8; |
| 134 | return (bfd_vma) v; |
| 135 | } |
| 136 | |
| 137 | bfd_vma bfd_getb16 (const bfd_byte *addr) |
| 138 | { |
| 139 | unsigned long v; |
| 140 | |
| 141 | v = (unsigned long) addr[0] << 24; |
| 142 | v |= (unsigned long) addr[1] << 16; |
| 143 | return (bfd_vma) v; |
| 144 | } |
| 145 | |
Richard Henderson | c46ffd5 | 2013-08-16 23:29:45 -0700 | [diff] [blame] | 146 | static int print_insn_objdump(bfd_vma pc, disassemble_info *info, |
| 147 | const char *prefix) |
| 148 | { |
| 149 | int i, n = info->buffer_length; |
| 150 | uint8_t *buf = g_malloc(n); |
| 151 | |
| 152 | info->read_memory_func(pc, buf, n, info); |
| 153 | |
| 154 | for (i = 0; i < n; ++i) { |
| 155 | if (i % 32 == 0) { |
| 156 | info->fprintf_func(info->stream, "\n%s: ", prefix); |
| 157 | } |
| 158 | info->fprintf_func(info->stream, "%02x", buf[i]); |
| 159 | } |
| 160 | |
| 161 | g_free(buf); |
| 162 | return n; |
| 163 | } |
| 164 | |
| 165 | static int print_insn_od_host(bfd_vma pc, disassemble_info *info) |
| 166 | { |
| 167 | return print_insn_objdump(pc, info, "OBJD-H"); |
| 168 | } |
| 169 | |
| 170 | static int print_insn_od_target(bfd_vma pc, disassemble_info *info) |
| 171 | { |
| 172 | return print_insn_objdump(pc, info, "OBJD-T"); |
| 173 | } |
| 174 | |
ths | e91c8a7 | 2007-06-03 13:35:16 +0000 | [diff] [blame] | 175 | /* Disassemble this for me please... (debugging). 'flags' has the following |
bellard | c2d551f | 2005-04-27 20:15:00 +0000 | [diff] [blame] | 176 | values: |
Frediano Ziglio | e99722f | 2011-08-25 09:14:38 +0200 | [diff] [blame] | 177 | i386 - 1 means 16 bit code, 2 means 64 bit code |
Tom Musta | e13951f | 2014-04-09 14:53:23 -0500 | [diff] [blame] | 178 | ppc - bits 0:15 specify (optionally) the machine instruction set; |
| 179 | bit 16 indicates little endian. |
bellard | c2d551f | 2005-04-27 20:15:00 +0000 | [diff] [blame] | 180 | other targets - unused |
| 181 | */ |
Peter Crosthwaite | d49190c | 2015-05-24 14:20:41 -0700 | [diff] [blame] | 182 | void target_disas(FILE *out, CPUState *cpu, target_ulong code, |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 183 | target_ulong size, int flags) |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 184 | { |
Peter Crosthwaite | 37b9de4 | 2015-06-23 20:57:33 -0700 | [diff] [blame] | 185 | CPUClass *cc = CPU_GET_CLASS(cpu); |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 186 | target_ulong pc; |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 187 | int count; |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 188 | CPUDebug s; |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 189 | |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 190 | INIT_DISASSEMBLE_INFO(s.info, out, fprintf); |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 191 | |
Peter Crosthwaite | d49190c | 2015-05-24 14:20:41 -0700 | [diff] [blame] | 192 | s.cpu = cpu; |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 193 | s.info.read_memory_func = target_read_memory; |
| 194 | s.info.buffer_vma = code; |
| 195 | s.info.buffer_length = size; |
Peter Crosthwaite | 9504c54 | 2015-07-05 13:50:32 -0700 | [diff] [blame] | 196 | s.info.print_address_func = generic_print_address; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 197 | |
| 198 | #ifdef TARGET_WORDS_BIGENDIAN |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 199 | s.info.endian = BFD_ENDIAN_BIG; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 200 | #else |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 201 | s.info.endian = BFD_ENDIAN_LITTLE; |
bellard | c6105c0 | 2003-10-27 21:13:58 +0000 | [diff] [blame] | 202 | #endif |
Peter Crosthwaite | 37b9de4 | 2015-06-23 20:57:33 -0700 | [diff] [blame] | 203 | |
| 204 | if (cc->disas_set_info) { |
| 205 | cc->disas_set_info(cpu, &s.info); |
| 206 | } |
| 207 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 208 | #if defined(TARGET_I386) |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 209 | if (flags == 2) { |
| 210 | s.info.mach = bfd_mach_x86_64; |
| 211 | } else if (flags == 1) { |
| 212 | s.info.mach = bfd_mach_i386_i8086; |
| 213 | } else { |
| 214 | s.info.mach = bfd_mach_i386_i386; |
| 215 | } |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 216 | s.info.print_insn = print_insn_i386; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 217 | #elif defined(TARGET_SPARC) |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 218 | s.info.print_insn = print_insn_sparc; |
bellard | 3475187 | 2005-07-02 14:31:34 +0000 | [diff] [blame] | 219 | #ifdef TARGET_SPARC64 |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 220 | s.info.mach = bfd_mach_sparc_v9b; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 221 | #endif |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 222 | #elif defined(TARGET_PPC) |
Tom Musta | e13951f | 2014-04-09 14:53:23 -0500 | [diff] [blame] | 223 | if ((flags >> 16) & 1) { |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 224 | s.info.endian = BFD_ENDIAN_LITTLE; |
| 225 | } |
j_mayer | 237c0af | 2007-09-29 12:01:46 +0000 | [diff] [blame] | 226 | if (flags & 0xFFFF) { |
Tom Musta | e13951f | 2014-04-09 14:53:23 -0500 | [diff] [blame] | 227 | /* If we have a precise definition of the instruction set, use it. */ |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 228 | s.info.mach = flags & 0xFFFF; |
j_mayer | 237c0af | 2007-09-29 12:01:46 +0000 | [diff] [blame] | 229 | } else { |
bellard | a245862 | 2005-07-23 22:39:53 +0000 | [diff] [blame] | 230 | #ifdef TARGET_PPC64 |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 231 | s.info.mach = bfd_mach_ppc64; |
bellard | a245862 | 2005-07-23 22:39:53 +0000 | [diff] [blame] | 232 | #else |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 233 | s.info.mach = bfd_mach_ppc; |
bellard | a245862 | 2005-07-23 22:39:53 +0000 | [diff] [blame] | 234 | #endif |
j_mayer | 237c0af | 2007-09-29 12:01:46 +0000 | [diff] [blame] | 235 | } |
Aurelien Jarno | 88770fe | 2013-04-20 08:56:14 +0000 | [diff] [blame] | 236 | s.info.disassembler_options = (char *)"any"; |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 237 | s.info.print_insn = print_insn_ppc; |
pbrook | e6e5906 | 2006-10-22 00:18:54 +0000 | [diff] [blame] | 238 | #elif defined(TARGET_M68K) |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 239 | s.info.print_insn = print_insn_m68k; |
bellard | 6af0bf9 | 2005-07-02 14:58:51 +0000 | [diff] [blame] | 240 | #elif defined(TARGET_MIPS) |
bellard | 76b3030 | 2005-12-17 01:10:04 +0000 | [diff] [blame] | 241 | #ifdef TARGET_WORDS_BIGENDIAN |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 242 | s.info.print_insn = print_insn_big_mips; |
bellard | 76b3030 | 2005-12-17 01:10:04 +0000 | [diff] [blame] | 243 | #else |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 244 | s.info.print_insn = print_insn_little_mips; |
bellard | 76b3030 | 2005-12-17 01:10:04 +0000 | [diff] [blame] | 245 | #endif |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 246 | #elif defined(TARGET_SH4) |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 247 | s.info.mach = bfd_mach_sh4; |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 248 | s.info.print_insn = print_insn_sh; |
j_mayer | eddf68a | 2007-04-05 07:22:49 +0000 | [diff] [blame] | 249 | #elif defined(TARGET_ALPHA) |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 250 | s.info.mach = bfd_mach_alpha_ev6; |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 251 | s.info.print_insn = print_insn_alpha; |
Ulrich Hecht | db50060 | 2011-03-29 15:29:32 +0200 | [diff] [blame] | 252 | #elif defined(TARGET_S390X) |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 253 | s.info.mach = bfd_mach_s390_64; |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 254 | s.info.print_insn = print_insn_s390; |
Anthony Green | bd86a88 | 2013-03-18 15:49:23 -0400 | [diff] [blame] | 255 | #elif defined(TARGET_MOXIE) |
| 256 | s.info.mach = bfd_arch_moxie; |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 257 | s.info.print_insn = print_insn_moxie; |
Michael Walle | 79368f4 | 2012-03-31 19:54:20 +0200 | [diff] [blame] | 258 | #elif defined(TARGET_LM32) |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 259 | s.info.mach = bfd_mach_lm32; |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 260 | s.info.print_insn = print_insn_lm32; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 261 | #endif |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 262 | if (s.info.print_insn == NULL) { |
| 263 | s.info.print_insn = print_insn_od_target; |
Richard Henderson | c46ffd5 | 2013-08-16 23:29:45 -0700 | [diff] [blame] | 264 | } |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 265 | |
blueswir1 | 7e000c2 | 2009-02-13 21:44:41 +0000 | [diff] [blame] | 266 | for (pc = code; size > 0; pc += count, size -= count) { |
bellard | fa15e03 | 2005-01-31 23:32:31 +0000 | [diff] [blame] | 267 | fprintf(out, "0x" TARGET_FMT_lx ": ", pc); |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 268 | count = s.info.print_insn(pc, &s.info); |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 269 | #if 0 |
| 270 | { |
| 271 | int i; |
| 272 | uint8_t b; |
| 273 | fprintf(out, " {"); |
| 274 | for(i = 0; i < count; i++) { |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 275 | target_read_memory(pc + i, &b, 1, &s.info); |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 276 | fprintf(out, " %02x", b); |
| 277 | } |
| 278 | fprintf(out, " }"); |
| 279 | } |
| 280 | #endif |
| 281 | fprintf(out, "\n"); |
| 282 | if (count < 0) |
| 283 | break; |
malc | 754d00a | 2009-04-21 22:26:22 +0000 | [diff] [blame] | 284 | if (size < count) { |
| 285 | fprintf(out, |
| 286 | "Disassembler disagrees with translator over instruction " |
| 287 | "decoding\n" |
| 288 | "Please report this to qemu-devel@nongnu.org\n"); |
| 289 | break; |
| 290 | } |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 291 | } |
| 292 | } |
| 293 | |
| 294 | /* Disassemble this for me please... (debugging). */ |
| 295 | void disas(FILE *out, void *code, unsigned long size) |
| 296 | { |
Stefan Weil | b0b0f1c | 2012-04-12 15:44:35 +0200 | [diff] [blame] | 297 | uintptr_t pc; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 298 | int count; |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 299 | CPUDebug s; |
Richard Henderson | c46ffd5 | 2013-08-16 23:29:45 -0700 | [diff] [blame] | 300 | int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 301 | |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 302 | INIT_DISASSEMBLE_INFO(s.info, out, fprintf); |
| 303 | s.info.print_address_func = generic_print_host_address; |
bellard | c6105c0 | 2003-10-27 21:13:58 +0000 | [diff] [blame] | 304 | |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 305 | s.info.buffer = code; |
| 306 | s.info.buffer_vma = (uintptr_t)code; |
| 307 | s.info.buffer_length = size; |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 308 | |
Juan Quintela | e2542fe | 2009-07-27 16:13:06 +0200 | [diff] [blame] | 309 | #ifdef HOST_WORDS_BIGENDIAN |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 310 | s.info.endian = BFD_ENDIAN_BIG; |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 311 | #else |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 312 | s.info.endian = BFD_ENDIAN_LITTLE; |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 313 | #endif |
Stefan Weil | 5826e51 | 2011-10-05 20:03:53 +0200 | [diff] [blame] | 314 | #if defined(CONFIG_TCG_INTERPRETER) |
| 315 | print_insn = print_insn_tci; |
| 316 | #elif defined(__i386__) |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 317 | s.info.mach = bfd_mach_i386_i386; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 318 | print_insn = print_insn_i386; |
bellard | bc51c5c | 2004-03-17 23:46:04 +0000 | [diff] [blame] | 319 | #elif defined(__x86_64__) |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 320 | s.info.mach = bfd_mach_x86_64; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 321 | print_insn = print_insn_i386; |
malc | e58ffeb | 2009-01-14 18:39:49 +0000 | [diff] [blame] | 322 | #elif defined(_ARCH_PPC) |
Richard Henderson | 66d4f6a | 2013-01-31 11:16:21 -0800 | [diff] [blame] | 323 | s.info.disassembler_options = (char *)"any"; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 324 | print_insn = print_insn_ppc; |
Claudio Fontana | 999b53e | 2014-02-05 17:27:28 +0000 | [diff] [blame] | 325 | #elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS) |
| 326 | print_insn = print_insn_arm_a64; |
bellard | a993ba8 | 2003-05-11 12:25:45 +0000 | [diff] [blame] | 327 | #elif defined(__alpha__) |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 328 | print_insn = print_insn_alpha; |
bellard | aa0aa4f | 2003-06-09 15:23:31 +0000 | [diff] [blame] | 329 | #elif defined(__sparc__) |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 330 | print_insn = print_insn_sparc; |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 331 | s.info.mach = bfd_mach_sparc_v9b; |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 332 | #elif defined(__arm__) |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 333 | print_insn = print_insn_arm; |
bellard | 6af0bf9 | 2005-07-02 14:58:51 +0000 | [diff] [blame] | 334 | #elif defined(__MIPSEB__) |
| 335 | print_insn = print_insn_big_mips; |
| 336 | #elif defined(__MIPSEL__) |
| 337 | print_insn = print_insn_little_mips; |
bellard | 48024e4 | 2005-11-06 16:52:11 +0000 | [diff] [blame] | 338 | #elif defined(__m68k__) |
| 339 | print_insn = print_insn_m68k; |
ths | 8f860bb | 2007-07-31 23:44:21 +0000 | [diff] [blame] | 340 | #elif defined(__s390__) |
| 341 | print_insn = print_insn_s390; |
aurel32 | f54b3f9 | 2008-04-12 20:14:54 +0000 | [diff] [blame] | 342 | #elif defined(__hppa__) |
| 343 | print_insn = print_insn_hppa; |
Aurelien Jarno | 903ec55 | 2010-03-29 02:12:51 +0200 | [diff] [blame] | 344 | #elif defined(__ia64__) |
| 345 | print_insn = print_insn_ia64; |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 346 | #endif |
Richard Henderson | c46ffd5 | 2013-08-16 23:29:45 -0700 | [diff] [blame] | 347 | if (print_insn == NULL) { |
| 348 | print_insn = print_insn_od_host; |
| 349 | } |
Stefan Weil | b0b0f1c | 2012-04-12 15:44:35 +0200 | [diff] [blame] | 350 | for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) { |
| 351 | fprintf(out, "0x%08" PRIxPTR ": ", pc); |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 352 | count = print_insn(pc, &s.info); |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 353 | fprintf(out, "\n"); |
| 354 | if (count < 0) |
| 355 | break; |
| 356 | } |
| 357 | } |
| 358 | |
| 359 | /* Look up symbol for debugging purpose. Returns "" if unknown. */ |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 360 | const char *lookup_symbol(target_ulong orig_addr) |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 361 | { |
pbrook | 49918a7 | 2008-10-22 15:11:31 +0000 | [diff] [blame] | 362 | const char *symbol = ""; |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 363 | struct syminfo *s; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 364 | |
bellard | e80cfcf | 2004-12-19 23:18:01 +0000 | [diff] [blame] | 365 | for (s = syminfos; s; s = s->next) { |
pbrook | 49918a7 | 2008-10-22 15:11:31 +0000 | [diff] [blame] | 366 | symbol = s->lookup_symbol(s, orig_addr); |
| 367 | if (symbol[0] != '\0') { |
| 368 | break; |
| 369 | } |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 370 | } |
pbrook | 49918a7 | 2008-10-22 15:11:31 +0000 | [diff] [blame] | 371 | |
| 372 | return symbol; |
bellard | b9adb4a | 2003-04-29 20:41:16 +0000 | [diff] [blame] | 373 | } |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 374 | |
| 375 | #if !defined(CONFIG_USER_ONLY) |
| 376 | |
Paolo Bonzini | 83c9089 | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 377 | #include "monitor/monitor.h" |
bellard | 3d2cfdf | 2004-08-01 21:49:07 +0000 | [diff] [blame] | 378 | |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 379 | static int monitor_disas_is_physical; |
| 380 | |
| 381 | static int |
blueswir1 | a5f1b96 | 2008-08-17 20:21:51 +0000 | [diff] [blame] | 382 | monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length, |
| 383 | struct disassemble_info *info) |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 384 | { |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 385 | CPUDebug *s = container_of(info, CPUDebug, info); |
| 386 | |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 387 | if (monitor_disas_is_physical) { |
Stefan Weil | 54f7b4a | 2011-04-10 18:23:39 +0200 | [diff] [blame] | 388 | cpu_physical_memory_read(memaddr, myaddr, length); |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 389 | } else { |
Peter Crosthwaite | d49190c | 2015-05-24 14:20:41 -0700 | [diff] [blame] | 390 | cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0); |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 391 | } |
| 392 | return 0; |
| 393 | } |
| 394 | |
Tom Musta | 1c38f84 | 2014-04-09 14:53:24 -0500 | [diff] [blame] | 395 | /* Disassembler for the monitor. |
| 396 | See target_disas for a description of flags. */ |
Peter Crosthwaite | d49190c | 2015-05-24 14:20:41 -0700 | [diff] [blame] | 397 | void monitor_disas(Monitor *mon, CPUState *cpu, |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 398 | target_ulong pc, int nb_insn, int is_physical, int flags) |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 399 | { |
Peter Crosthwaite | 37b9de4 | 2015-06-23 20:57:33 -0700 | [diff] [blame] | 400 | CPUClass *cc = CPU_GET_CLASS(cpu); |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 401 | int count, i; |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 402 | CPUDebug s; |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 403 | |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 404 | INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf); |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 405 | |
Peter Crosthwaite | d49190c | 2015-05-24 14:20:41 -0700 | [diff] [blame] | 406 | s.cpu = cpu; |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 407 | monitor_disas_is_physical = is_physical; |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 408 | s.info.read_memory_func = monitor_read_memory; |
Peter Crosthwaite | 9504c54 | 2015-07-05 13:50:32 -0700 | [diff] [blame] | 409 | s.info.print_address_func = generic_print_address; |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 410 | |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 411 | s.info.buffer_vma = pc; |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 412 | |
| 413 | #ifdef TARGET_WORDS_BIGENDIAN |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 414 | s.info.endian = BFD_ENDIAN_BIG; |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 415 | #else |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 416 | s.info.endian = BFD_ENDIAN_LITTLE; |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 417 | #endif |
Peter Crosthwaite | 37b9de4 | 2015-06-23 20:57:33 -0700 | [diff] [blame] | 418 | |
| 419 | if (cc->disas_set_info) { |
| 420 | cc->disas_set_info(cpu, &s.info); |
| 421 | } |
| 422 | |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 423 | #if defined(TARGET_I386) |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 424 | if (flags == 2) { |
| 425 | s.info.mach = bfd_mach_x86_64; |
| 426 | } else if (flags == 1) { |
| 427 | s.info.mach = bfd_mach_i386_i8086; |
| 428 | } else { |
| 429 | s.info.mach = bfd_mach_i386_i386; |
| 430 | } |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 431 | s.info.print_insn = print_insn_i386; |
ths | cbd669d | 2007-12-25 00:26:36 +0000 | [diff] [blame] | 432 | #elif defined(TARGET_ALPHA) |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 433 | s.info.print_insn = print_insn_alpha; |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 434 | #elif defined(TARGET_SPARC) |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 435 | s.info.print_insn = print_insn_sparc; |
blueswir1 | 682c4f1 | 2007-04-09 15:14:57 +0000 | [diff] [blame] | 436 | #ifdef TARGET_SPARC64 |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 437 | s.info.mach = bfd_mach_sparc_v9b; |
blueswir1 | 682c4f1 | 2007-04-09 15:14:57 +0000 | [diff] [blame] | 438 | #endif |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 439 | #elif defined(TARGET_PPC) |
Tom Musta | 1c38f84 | 2014-04-09 14:53:24 -0500 | [diff] [blame] | 440 | if (flags & 0xFFFF) { |
| 441 | /* If we have a precise definition of the instruction set, use it. */ |
| 442 | s.info.mach = flags & 0xFFFF; |
| 443 | } else { |
bellard | a245862 | 2005-07-23 22:39:53 +0000 | [diff] [blame] | 444 | #ifdef TARGET_PPC64 |
Tom Musta | 1c38f84 | 2014-04-09 14:53:24 -0500 | [diff] [blame] | 445 | s.info.mach = bfd_mach_ppc64; |
bellard | a245862 | 2005-07-23 22:39:53 +0000 | [diff] [blame] | 446 | #else |
Tom Musta | 1c38f84 | 2014-04-09 14:53:24 -0500 | [diff] [blame] | 447 | s.info.mach = bfd_mach_ppc; |
bellard | a245862 | 2005-07-23 22:39:53 +0000 | [diff] [blame] | 448 | #endif |
Tom Musta | 1c38f84 | 2014-04-09 14:53:24 -0500 | [diff] [blame] | 449 | } |
| 450 | if ((flags >> 16) & 1) { |
| 451 | s.info.endian = BFD_ENDIAN_LITTLE; |
| 452 | } |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 453 | s.info.print_insn = print_insn_ppc; |
pbrook | e6e5906 | 2006-10-22 00:18:54 +0000 | [diff] [blame] | 454 | #elif defined(TARGET_M68K) |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 455 | s.info.print_insn = print_insn_m68k; |
bellard | 6af0bf9 | 2005-07-02 14:58:51 +0000 | [diff] [blame] | 456 | #elif defined(TARGET_MIPS) |
bellard | 76b3030 | 2005-12-17 01:10:04 +0000 | [diff] [blame] | 457 | #ifdef TARGET_WORDS_BIGENDIAN |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 458 | s.info.print_insn = print_insn_big_mips; |
bellard | 76b3030 | 2005-12-17 01:10:04 +0000 | [diff] [blame] | 459 | #else |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 460 | s.info.print_insn = print_insn_little_mips; |
bellard | 76b3030 | 2005-12-17 01:10:04 +0000 | [diff] [blame] | 461 | #endif |
Magnus Damm | b4e1f07 | 2009-11-13 18:54:22 +0900 | [diff] [blame] | 462 | #elif defined(TARGET_SH4) |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 463 | s.info.mach = bfd_mach_sh4; |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 464 | s.info.print_insn = print_insn_sh; |
Ulrich Hecht | db50060 | 2011-03-29 15:29:32 +0200 | [diff] [blame] | 465 | #elif defined(TARGET_S390X) |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 466 | s.info.mach = bfd_mach_s390_64; |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 467 | s.info.print_insn = print_insn_s390; |
Anthony Green | bd86a88 | 2013-03-18 15:49:23 -0400 | [diff] [blame] | 468 | #elif defined(TARGET_MOXIE) |
| 469 | s.info.mach = bfd_arch_moxie; |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 470 | s.info.print_insn = print_insn_moxie; |
Michael Walle | 79368f4 | 2012-03-31 19:54:20 +0200 | [diff] [blame] | 471 | #elif defined(TARGET_LM32) |
Blue Swirl | f4359b9 | 2012-09-08 12:40:00 +0000 | [diff] [blame] | 472 | s.info.mach = bfd_mach_lm32; |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 473 | s.info.print_insn = print_insn_lm32; |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 474 | #endif |
Peter Crosthwaite | 37b9de4 | 2015-06-23 20:57:33 -0700 | [diff] [blame] | 475 | if (!s.info.print_insn) { |
| 476 | monitor_printf(mon, "0x" TARGET_FMT_lx |
| 477 | ": Asm output not supported on this arch\n", pc); |
| 478 | return; |
| 479 | } |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 480 | |
| 481 | for(i = 0; i < nb_insn; i++) { |
aliguori | 376253e | 2009-03-05 23:01:23 +0000 | [diff] [blame] | 482 | monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc); |
Peter Crosthwaite | 2de295c | 2015-06-23 20:57:32 -0700 | [diff] [blame] | 483 | count = s.info.print_insn(pc, &s.info); |
aliguori | 376253e | 2009-03-05 23:01:23 +0000 | [diff] [blame] | 484 | monitor_printf(mon, "\n"); |
bellard | 9307c4c | 2004-04-04 12:57:25 +0000 | [diff] [blame] | 485 | if (count < 0) |
| 486 | break; |
| 487 | pc += count; |
| 488 | } |
| 489 | } |
| 490 | #endif |