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bellardb9adb4a2003-04-29 20:41:16 +00001/* General "disassemble this chunk" code. Used for debugging. */
bellard5bbe9292003-06-09 19:38:38 +00002#include "config.h"
Peter Crosthwaite37b9de42015-06-23 20:57:33 -07003#include "qemu-common.h"
Paolo Bonzini76cad712012-10-24 11:12:21 +02004#include "disas/bfd.h"
bellardb9adb4a2003-04-29 20:41:16 +00005#include "elf.h"
bellardaa0aa4f2003-06-09 15:23:31 +00006#include <errno.h>
bellardb9adb4a2003-04-29 20:41:16 +00007
bellardc6105c02003-10-27 21:13:58 +00008#include "cpu.h"
Paolo Bonzini76cad712012-10-24 11:12:21 +02009#include "disas/disas.h"
bellardc6105c02003-10-27 21:13:58 +000010
Blue Swirlf4359b92012-09-08 12:40:00 +000011typedef struct CPUDebug {
12 struct disassemble_info info;
Peter Crosthwaited49190c2015-05-24 14:20:41 -070013 CPUState *cpu;
Blue Swirlf4359b92012-09-08 12:40:00 +000014} CPUDebug;
15
bellardb9adb4a2003-04-29 20:41:16 +000016/* Filled in by elfload.c. Simplistic, but will do for now. */
bellarde80cfcf2004-12-19 23:18:01 +000017struct syminfo *syminfos = NULL;
bellardb9adb4a2003-04-29 20:41:16 +000018
bellardaa0aa4f2003-06-09 15:23:31 +000019/* Get LENGTH bytes from info's buffer, at target address memaddr.
20 Transfer them to myaddr. */
21int
pbrook3a742b72008-10-22 15:55:18 +000022buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
23 struct disassemble_info *info)
bellardaa0aa4f2003-06-09 15:23:31 +000024{
bellardc6105c02003-10-27 21:13:58 +000025 if (memaddr < info->buffer_vma
26 || memaddr + length > info->buffer_vma + info->buffer_length)
27 /* Out of bounds. Use EIO because GDB uses it. */
28 return EIO;
29 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
30 return 0;
bellardaa0aa4f2003-06-09 15:23:31 +000031}
32
bellardc6105c02003-10-27 21:13:58 +000033/* Get LENGTH bytes from info's buffer, at target address memaddr.
34 Transfer them to myaddr. */
35static int
bellardc27004e2005-01-03 23:35:10 +000036target_read_memory (bfd_vma memaddr,
37 bfd_byte *myaddr,
38 int length,
39 struct disassemble_info *info)
bellardc6105c02003-10-27 21:13:58 +000040{
Blue Swirlf4359b92012-09-08 12:40:00 +000041 CPUDebug *s = container_of(info, CPUDebug, info);
42
Peter Crosthwaited49190c2015-05-24 14:20:41 -070043 cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
bellardc6105c02003-10-27 21:13:58 +000044 return 0;
45}
bellardc6105c02003-10-27 21:13:58 +000046
bellardaa0aa4f2003-06-09 15:23:31 +000047/* Print an error message. We can assume that this is in response to
48 an error return from buffer_read_memory. */
49void
pbrook3a742b72008-10-22 15:55:18 +000050perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
bellardaa0aa4f2003-06-09 15:23:31 +000051{
52 if (status != EIO)
53 /* Can't happen. */
54 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
55 else
56 /* Actually, address between memaddr and memaddr + len was
57 out of bounds. */
58 (*info->fprintf_func) (info->stream,
bellard26a76462006-06-25 18:15:32 +000059 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
bellardaa0aa4f2003-06-09 15:23:31 +000060}
61
Jim Meyeringa31f0532012-05-09 05:12:04 +000062/* This could be in a separate file, to save minuscule amounts of space
bellardaa0aa4f2003-06-09 15:23:31 +000063 in statically linked executables. */
64
65/* Just print the address is hex. This is included for completeness even
66 though both GDB and objdump provide their own (to print symbolic
67 addresses). */
68
69void
pbrook3a742b72008-10-22 15:55:18 +000070generic_print_address (bfd_vma addr, struct disassemble_info *info)
bellardaa0aa4f2003-06-09 15:23:31 +000071{
bellard26a76462006-06-25 18:15:32 +000072 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
bellardaa0aa4f2003-06-09 15:23:31 +000073}
74
Peter Maydell636bd282012-06-25 04:55:55 +000075/* Print address in hex, truncated to the width of a host virtual address. */
76static void
77generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
78{
79 uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
80 generic_print_address(addr & mask, info);
81}
82
bellardaa0aa4f2003-06-09 15:23:31 +000083/* Just return the given address. */
84
85int
pbrook3a742b72008-10-22 15:55:18 +000086generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
bellardaa0aa4f2003-06-09 15:23:31 +000087{
88 return 1;
89}
90
Aurelien Jarno903ec552010-03-29 02:12:51 +020091bfd_vma bfd_getl64 (const bfd_byte *addr)
92{
93 unsigned long long v;
94
95 v = (unsigned long long) addr[0];
96 v |= (unsigned long long) addr[1] << 8;
97 v |= (unsigned long long) addr[2] << 16;
98 v |= (unsigned long long) addr[3] << 24;
99 v |= (unsigned long long) addr[4] << 32;
100 v |= (unsigned long long) addr[5] << 40;
101 v |= (unsigned long long) addr[6] << 48;
102 v |= (unsigned long long) addr[7] << 56;
103 return (bfd_vma) v;
104}
105
bellardaa0aa4f2003-06-09 15:23:31 +0000106bfd_vma bfd_getl32 (const bfd_byte *addr)
107{
108 unsigned long v;
109
110 v = (unsigned long) addr[0];
111 v |= (unsigned long) addr[1] << 8;
112 v |= (unsigned long) addr[2] << 16;
113 v |= (unsigned long) addr[3] << 24;
114 return (bfd_vma) v;
115}
116
117bfd_vma bfd_getb32 (const bfd_byte *addr)
118{
119 unsigned long v;
120
121 v = (unsigned long) addr[0] << 24;
122 v |= (unsigned long) addr[1] << 16;
123 v |= (unsigned long) addr[2] << 8;
124 v |= (unsigned long) addr[3];
125 return (bfd_vma) v;
126}
127
bellard6af0bf92005-07-02 14:58:51 +0000128bfd_vma bfd_getl16 (const bfd_byte *addr)
129{
130 unsigned long v;
131
132 v = (unsigned long) addr[0];
133 v |= (unsigned long) addr[1] << 8;
134 return (bfd_vma) v;
135}
136
137bfd_vma bfd_getb16 (const bfd_byte *addr)
138{
139 unsigned long v;
140
141 v = (unsigned long) addr[0] << 24;
142 v |= (unsigned long) addr[1] << 16;
143 return (bfd_vma) v;
144}
145
Richard Hendersonc46ffd52013-08-16 23:29:45 -0700146static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
147 const char *prefix)
148{
149 int i, n = info->buffer_length;
150 uint8_t *buf = g_malloc(n);
151
152 info->read_memory_func(pc, buf, n, info);
153
154 for (i = 0; i < n; ++i) {
155 if (i % 32 == 0) {
156 info->fprintf_func(info->stream, "\n%s: ", prefix);
157 }
158 info->fprintf_func(info->stream, "%02x", buf[i]);
159 }
160
161 g_free(buf);
162 return n;
163}
164
165static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
166{
167 return print_insn_objdump(pc, info, "OBJD-H");
168}
169
170static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
171{
172 return print_insn_objdump(pc, info, "OBJD-T");
173}
174
thse91c8a72007-06-03 13:35:16 +0000175/* Disassemble this for me please... (debugging). 'flags' has the following
bellardc2d551f2005-04-27 20:15:00 +0000176 values:
Frediano Ziglioe99722f2011-08-25 09:14:38 +0200177 i386 - 1 means 16 bit code, 2 means 64 bit code
Tom Mustae13951f2014-04-09 14:53:23 -0500178 ppc - bits 0:15 specify (optionally) the machine instruction set;
179 bit 16 indicates little endian.
bellardc2d551f2005-04-27 20:15:00 +0000180 other targets - unused
181 */
Peter Crosthwaited49190c2015-05-24 14:20:41 -0700182void target_disas(FILE *out, CPUState *cpu, target_ulong code,
Blue Swirlf4359b92012-09-08 12:40:00 +0000183 target_ulong size, int flags)
bellardb9adb4a2003-04-29 20:41:16 +0000184{
Peter Crosthwaite37b9de42015-06-23 20:57:33 -0700185 CPUClass *cc = CPU_GET_CLASS(cpu);
bellardc27004e2005-01-03 23:35:10 +0000186 target_ulong pc;
bellardb9adb4a2003-04-29 20:41:16 +0000187 int count;
Blue Swirlf4359b92012-09-08 12:40:00 +0000188 CPUDebug s;
bellardb9adb4a2003-04-29 20:41:16 +0000189
Blue Swirlf4359b92012-09-08 12:40:00 +0000190 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
bellardb9adb4a2003-04-29 20:41:16 +0000191
Peter Crosthwaited49190c2015-05-24 14:20:41 -0700192 s.cpu = cpu;
Blue Swirlf4359b92012-09-08 12:40:00 +0000193 s.info.read_memory_func = target_read_memory;
194 s.info.buffer_vma = code;
195 s.info.buffer_length = size;
Peter Crosthwaite9504c542015-07-05 13:50:32 -0700196 s.info.print_address_func = generic_print_address;
bellardc27004e2005-01-03 23:35:10 +0000197
198#ifdef TARGET_WORDS_BIGENDIAN
Blue Swirlf4359b92012-09-08 12:40:00 +0000199 s.info.endian = BFD_ENDIAN_BIG;
bellardc27004e2005-01-03 23:35:10 +0000200#else
Blue Swirlf4359b92012-09-08 12:40:00 +0000201 s.info.endian = BFD_ENDIAN_LITTLE;
bellardc6105c02003-10-27 21:13:58 +0000202#endif
Peter Crosthwaite37b9de42015-06-23 20:57:33 -0700203
204 if (cc->disas_set_info) {
205 cc->disas_set_info(cpu, &s.info);
206 }
207
bellardc27004e2005-01-03 23:35:10 +0000208#if defined(TARGET_I386)
Blue Swirlf4359b92012-09-08 12:40:00 +0000209 if (flags == 2) {
210 s.info.mach = bfd_mach_x86_64;
211 } else if (flags == 1) {
212 s.info.mach = bfd_mach_i386_i8086;
213 } else {
214 s.info.mach = bfd_mach_i386_i386;
215 }
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700216 s.info.print_insn = print_insn_i386;
bellardc27004e2005-01-03 23:35:10 +0000217#elif defined(TARGET_PPC)
Tom Mustae13951f2014-04-09 14:53:23 -0500218 if ((flags >> 16) & 1) {
Blue Swirlf4359b92012-09-08 12:40:00 +0000219 s.info.endian = BFD_ENDIAN_LITTLE;
220 }
j_mayer237c0af2007-09-29 12:01:46 +0000221 if (flags & 0xFFFF) {
Tom Mustae13951f2014-04-09 14:53:23 -0500222 /* If we have a precise definition of the instruction set, use it. */
Blue Swirlf4359b92012-09-08 12:40:00 +0000223 s.info.mach = flags & 0xFFFF;
j_mayer237c0af2007-09-29 12:01:46 +0000224 } else {
bellarda2458622005-07-23 22:39:53 +0000225#ifdef TARGET_PPC64
Blue Swirlf4359b92012-09-08 12:40:00 +0000226 s.info.mach = bfd_mach_ppc64;
bellarda2458622005-07-23 22:39:53 +0000227#else
Blue Swirlf4359b92012-09-08 12:40:00 +0000228 s.info.mach = bfd_mach_ppc;
bellarda2458622005-07-23 22:39:53 +0000229#endif
j_mayer237c0af2007-09-29 12:01:46 +0000230 }
Aurelien Jarno88770fe2013-04-20 08:56:14 +0000231 s.info.disassembler_options = (char *)"any";
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700232 s.info.print_insn = print_insn_ppc;
bellardc27004e2005-01-03 23:35:10 +0000233#endif
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700234 if (s.info.print_insn == NULL) {
235 s.info.print_insn = print_insn_od_target;
Richard Hendersonc46ffd52013-08-16 23:29:45 -0700236 }
bellardc27004e2005-01-03 23:35:10 +0000237
blueswir17e000c22009-02-13 21:44:41 +0000238 for (pc = code; size > 0; pc += count, size -= count) {
bellardfa15e032005-01-31 23:32:31 +0000239 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700240 count = s.info.print_insn(pc, &s.info);
bellardc27004e2005-01-03 23:35:10 +0000241#if 0
242 {
243 int i;
244 uint8_t b;
245 fprintf(out, " {");
246 for(i = 0; i < count; i++) {
Blue Swirlf4359b92012-09-08 12:40:00 +0000247 target_read_memory(pc + i, &b, 1, &s.info);
bellardc27004e2005-01-03 23:35:10 +0000248 fprintf(out, " %02x", b);
249 }
250 fprintf(out, " }");
251 }
252#endif
253 fprintf(out, "\n");
254 if (count < 0)
255 break;
malc754d00a2009-04-21 22:26:22 +0000256 if (size < count) {
257 fprintf(out,
258 "Disassembler disagrees with translator over instruction "
259 "decoding\n"
260 "Please report this to qemu-devel@nongnu.org\n");
261 break;
262 }
bellardc27004e2005-01-03 23:35:10 +0000263 }
264}
265
266/* Disassemble this for me please... (debugging). */
267void disas(FILE *out, void *code, unsigned long size)
268{
Stefan Weilb0b0f1c2012-04-12 15:44:35 +0200269 uintptr_t pc;
bellardc27004e2005-01-03 23:35:10 +0000270 int count;
Blue Swirlf4359b92012-09-08 12:40:00 +0000271 CPUDebug s;
Richard Hendersonc46ffd52013-08-16 23:29:45 -0700272 int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
bellardc27004e2005-01-03 23:35:10 +0000273
Blue Swirlf4359b92012-09-08 12:40:00 +0000274 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
275 s.info.print_address_func = generic_print_host_address;
bellardc6105c02003-10-27 21:13:58 +0000276
Blue Swirlf4359b92012-09-08 12:40:00 +0000277 s.info.buffer = code;
278 s.info.buffer_vma = (uintptr_t)code;
279 s.info.buffer_length = size;
bellardb9adb4a2003-04-29 20:41:16 +0000280
Juan Quintelae2542fe2009-07-27 16:13:06 +0200281#ifdef HOST_WORDS_BIGENDIAN
Blue Swirlf4359b92012-09-08 12:40:00 +0000282 s.info.endian = BFD_ENDIAN_BIG;
bellardb9adb4a2003-04-29 20:41:16 +0000283#else
Blue Swirlf4359b92012-09-08 12:40:00 +0000284 s.info.endian = BFD_ENDIAN_LITTLE;
bellardb9adb4a2003-04-29 20:41:16 +0000285#endif
Stefan Weil5826e512011-10-05 20:03:53 +0200286#if defined(CONFIG_TCG_INTERPRETER)
287 print_insn = print_insn_tci;
288#elif defined(__i386__)
Blue Swirlf4359b92012-09-08 12:40:00 +0000289 s.info.mach = bfd_mach_i386_i386;
bellardc27004e2005-01-03 23:35:10 +0000290 print_insn = print_insn_i386;
bellardbc51c5c2004-03-17 23:46:04 +0000291#elif defined(__x86_64__)
Blue Swirlf4359b92012-09-08 12:40:00 +0000292 s.info.mach = bfd_mach_x86_64;
bellardc27004e2005-01-03 23:35:10 +0000293 print_insn = print_insn_i386;
malce58ffeb2009-01-14 18:39:49 +0000294#elif defined(_ARCH_PPC)
Richard Henderson66d4f6a2013-01-31 11:16:21 -0800295 s.info.disassembler_options = (char *)"any";
bellardc27004e2005-01-03 23:35:10 +0000296 print_insn = print_insn_ppc;
Claudio Fontana999b53e2014-02-05 17:27:28 +0000297#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
298 print_insn = print_insn_arm_a64;
bellarda993ba82003-05-11 12:25:45 +0000299#elif defined(__alpha__)
bellardc27004e2005-01-03 23:35:10 +0000300 print_insn = print_insn_alpha;
bellardaa0aa4f2003-06-09 15:23:31 +0000301#elif defined(__sparc__)
bellardc27004e2005-01-03 23:35:10 +0000302 print_insn = print_insn_sparc;
Blue Swirlf4359b92012-09-08 12:40:00 +0000303 s.info.mach = bfd_mach_sparc_v9b;
ths5fafdf22007-09-16 21:08:06 +0000304#elif defined(__arm__)
bellardc27004e2005-01-03 23:35:10 +0000305 print_insn = print_insn_arm;
bellard6af0bf92005-07-02 14:58:51 +0000306#elif defined(__MIPSEB__)
307 print_insn = print_insn_big_mips;
308#elif defined(__MIPSEL__)
309 print_insn = print_insn_little_mips;
bellard48024e42005-11-06 16:52:11 +0000310#elif defined(__m68k__)
311 print_insn = print_insn_m68k;
ths8f860bb2007-07-31 23:44:21 +0000312#elif defined(__s390__)
313 print_insn = print_insn_s390;
aurel32f54b3f92008-04-12 20:14:54 +0000314#elif defined(__hppa__)
315 print_insn = print_insn_hppa;
Aurelien Jarno903ec552010-03-29 02:12:51 +0200316#elif defined(__ia64__)
317 print_insn = print_insn_ia64;
bellardb9adb4a2003-04-29 20:41:16 +0000318#endif
Richard Hendersonc46ffd52013-08-16 23:29:45 -0700319 if (print_insn == NULL) {
320 print_insn = print_insn_od_host;
321 }
Stefan Weilb0b0f1c2012-04-12 15:44:35 +0200322 for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
323 fprintf(out, "0x%08" PRIxPTR ": ", pc);
Blue Swirlf4359b92012-09-08 12:40:00 +0000324 count = print_insn(pc, &s.info);
bellardb9adb4a2003-04-29 20:41:16 +0000325 fprintf(out, "\n");
326 if (count < 0)
327 break;
328 }
329}
330
331/* Look up symbol for debugging purpose. Returns "" if unknown. */
bellardc27004e2005-01-03 23:35:10 +0000332const char *lookup_symbol(target_ulong orig_addr)
bellardb9adb4a2003-04-29 20:41:16 +0000333{
pbrook49918a72008-10-22 15:11:31 +0000334 const char *symbol = "";
bellarde80cfcf2004-12-19 23:18:01 +0000335 struct syminfo *s;
ths3b46e622007-09-17 08:09:54 +0000336
bellarde80cfcf2004-12-19 23:18:01 +0000337 for (s = syminfos; s; s = s->next) {
pbrook49918a72008-10-22 15:11:31 +0000338 symbol = s->lookup_symbol(s, orig_addr);
339 if (symbol[0] != '\0') {
340 break;
341 }
bellardb9adb4a2003-04-29 20:41:16 +0000342 }
pbrook49918a72008-10-22 15:11:31 +0000343
344 return symbol;
bellardb9adb4a2003-04-29 20:41:16 +0000345}
bellard9307c4c2004-04-04 12:57:25 +0000346
347#if !defined(CONFIG_USER_ONLY)
348
Paolo Bonzini83c90892012-12-17 18:19:49 +0100349#include "monitor/monitor.h"
bellard3d2cfdf2004-08-01 21:49:07 +0000350
bellard9307c4c2004-04-04 12:57:25 +0000351static int monitor_disas_is_physical;
352
353static int
blueswir1a5f1b962008-08-17 20:21:51 +0000354monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
355 struct disassemble_info *info)
bellard9307c4c2004-04-04 12:57:25 +0000356{
Blue Swirlf4359b92012-09-08 12:40:00 +0000357 CPUDebug *s = container_of(info, CPUDebug, info);
358
bellard9307c4c2004-04-04 12:57:25 +0000359 if (monitor_disas_is_physical) {
Stefan Weil54f7b4a2011-04-10 18:23:39 +0200360 cpu_physical_memory_read(memaddr, myaddr, length);
bellard9307c4c2004-04-04 12:57:25 +0000361 } else {
Peter Crosthwaited49190c2015-05-24 14:20:41 -0700362 cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
bellard9307c4c2004-04-04 12:57:25 +0000363 }
364 return 0;
365}
366
Tom Musta1c38f842014-04-09 14:53:24 -0500367/* Disassembler for the monitor.
368 See target_disas for a description of flags. */
Peter Crosthwaited49190c2015-05-24 14:20:41 -0700369void monitor_disas(Monitor *mon, CPUState *cpu,
bellard6a00d602005-11-21 23:25:50 +0000370 target_ulong pc, int nb_insn, int is_physical, int flags)
bellard9307c4c2004-04-04 12:57:25 +0000371{
Peter Crosthwaite37b9de42015-06-23 20:57:33 -0700372 CPUClass *cc = CPU_GET_CLASS(cpu);
bellard9307c4c2004-04-04 12:57:25 +0000373 int count, i;
Blue Swirlf4359b92012-09-08 12:40:00 +0000374 CPUDebug s;
bellard9307c4c2004-04-04 12:57:25 +0000375
Blue Swirlf4359b92012-09-08 12:40:00 +0000376 INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
bellard9307c4c2004-04-04 12:57:25 +0000377
Peter Crosthwaited49190c2015-05-24 14:20:41 -0700378 s.cpu = cpu;
bellard9307c4c2004-04-04 12:57:25 +0000379 monitor_disas_is_physical = is_physical;
Blue Swirlf4359b92012-09-08 12:40:00 +0000380 s.info.read_memory_func = monitor_read_memory;
Peter Crosthwaite9504c542015-07-05 13:50:32 -0700381 s.info.print_address_func = generic_print_address;
bellard9307c4c2004-04-04 12:57:25 +0000382
Blue Swirlf4359b92012-09-08 12:40:00 +0000383 s.info.buffer_vma = pc;
bellard9307c4c2004-04-04 12:57:25 +0000384
385#ifdef TARGET_WORDS_BIGENDIAN
Blue Swirlf4359b92012-09-08 12:40:00 +0000386 s.info.endian = BFD_ENDIAN_BIG;
bellard9307c4c2004-04-04 12:57:25 +0000387#else
Blue Swirlf4359b92012-09-08 12:40:00 +0000388 s.info.endian = BFD_ENDIAN_LITTLE;
bellard9307c4c2004-04-04 12:57:25 +0000389#endif
Peter Crosthwaite37b9de42015-06-23 20:57:33 -0700390
391 if (cc->disas_set_info) {
392 cc->disas_set_info(cpu, &s.info);
393 }
394
bellard9307c4c2004-04-04 12:57:25 +0000395#if defined(TARGET_I386)
Blue Swirlf4359b92012-09-08 12:40:00 +0000396 if (flags == 2) {
397 s.info.mach = bfd_mach_x86_64;
398 } else if (flags == 1) {
399 s.info.mach = bfd_mach_i386_i8086;
400 } else {
401 s.info.mach = bfd_mach_i386_i386;
402 }
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700403 s.info.print_insn = print_insn_i386;
bellard9307c4c2004-04-04 12:57:25 +0000404#elif defined(TARGET_PPC)
Tom Musta1c38f842014-04-09 14:53:24 -0500405 if (flags & 0xFFFF) {
406 /* If we have a precise definition of the instruction set, use it. */
407 s.info.mach = flags & 0xFFFF;
408 } else {
bellarda2458622005-07-23 22:39:53 +0000409#ifdef TARGET_PPC64
Tom Musta1c38f842014-04-09 14:53:24 -0500410 s.info.mach = bfd_mach_ppc64;
bellarda2458622005-07-23 22:39:53 +0000411#else
Tom Musta1c38f842014-04-09 14:53:24 -0500412 s.info.mach = bfd_mach_ppc;
bellarda2458622005-07-23 22:39:53 +0000413#endif
Tom Musta1c38f842014-04-09 14:53:24 -0500414 }
415 if ((flags >> 16) & 1) {
416 s.info.endian = BFD_ENDIAN_LITTLE;
417 }
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700418 s.info.print_insn = print_insn_ppc;
bellard9307c4c2004-04-04 12:57:25 +0000419#endif
Peter Crosthwaite37b9de42015-06-23 20:57:33 -0700420 if (!s.info.print_insn) {
421 monitor_printf(mon, "0x" TARGET_FMT_lx
422 ": Asm output not supported on this arch\n", pc);
423 return;
424 }
bellard9307c4c2004-04-04 12:57:25 +0000425
426 for(i = 0; i < nb_insn; i++) {
aliguori376253e2009-03-05 23:01:23 +0000427 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700428 count = s.info.print_insn(pc, &s.info);
aliguori376253e2009-03-05 23:01:23 +0000429 monitor_printf(mon, "\n");
bellard9307c4c2004-04-04 12:57:25 +0000430 if (count < 0)
431 break;
432 pc += count;
433 }
434}
435#endif