| pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 1 | #ifndef HW_MCF_H |
| 2 | #define HW_MCF_H |
| 3 | /* Motorola ColdFire device prototypes. */ |
| 4 | |
| Benoît Canet | 653fa85 | 2011-11-24 14:31:12 +0100 | [diff] [blame] | 5 | struct MemoryRegion; |
| 6 | |
| pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 7 | /* mcf_uart.c */ |
| Benoît Canet | aa6e498 | 2011-11-24 14:31:13 +0100 | [diff] [blame] | 8 | uint64_t mcf_uart_read(void *opaque, target_phys_addr_t addr, |
| 9 | unsigned size); |
| 10 | void mcf_uart_write(void *opaque, target_phys_addr_t addr, |
| 11 | uint64_t val, unsigned size); |
| pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 12 | void *mcf_uart_init(qemu_irq irq, CharDriverState *chr); |
| Benoît Canet | aa6e498 | 2011-11-24 14:31:13 +0100 | [diff] [blame] | 13 | void mcf_uart_mm_init(struct MemoryRegion *sysmem, |
| 14 | target_phys_addr_t base, |
| 15 | qemu_irq irq, CharDriverState *chr); |
| pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 16 | |
| 17 | /* mcf_intc.c */ |
| Benoît Canet | 663d944 | 2011-11-24 14:31:15 +0100 | [diff] [blame] | 18 | qemu_irq *mcf_intc_init(struct MemoryRegion *sysmem, |
| 19 | target_phys_addr_t base, |
| 20 | CPUState *env); |
| pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 21 | |
| 22 | /* mcf_fec.c */ |
| Benoît Canet | c65fc1d | 2011-11-24 14:31:14 +0100 | [diff] [blame] | 23 | void mcf_fec_init(struct MemoryRegion *sysmem, NICInfo *nd, |
| 24 | target_phys_addr_t base, qemu_irq *irq); |
| pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 25 | |
| 26 | /* mcf5206.c */ |
| Benoît Canet | 653fa85 | 2011-11-24 14:31:12 +0100 | [diff] [blame] | 27 | qemu_irq *mcf5206_init(struct MemoryRegion *sysmem, |
| 28 | uint32_t base, CPUState *env); |
| pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 29 | |
| 30 | #endif |
