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bellardfc01f7e2003-06-30 10:03:06 +00001/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
bellard67b915a2004-03-31 23:37:16 +000027/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
bellard85571bc2004-11-07 18:04:02 +000033#include <limits.h>
bellard8a7ddc32004-03-31 19:00:16 +000034#include <time.h>
bellard67b915a2004-03-31 23:37:16 +000035#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
bellard7d3505c2004-05-12 19:32:15 +000039#include <sys/stat.h>
bellardfb065182004-11-09 23:09:44 +000040#include "audio/audio.h"
bellard67b915a2004-03-31 23:37:16 +000041
42#ifndef O_LARGEFILE
43#define O_LARGEFILE 0
44#endif
bellard40c3bac2004-04-04 12:56:28 +000045#ifndef O_BINARY
46#define O_BINARY 0
47#endif
bellard67b915a2004-03-31 23:37:16 +000048
49#ifdef _WIN32
bellard57d1a2b2004-08-03 21:15:11 +000050#define lseek _lseeki64
51#define ENOTSUP 4096
52/* XXX: find 64 bit version */
53#define ftruncate chsize
54
55static inline char *realpath(const char *path, char *resolved_path)
56{
57 _fullpath(resolved_path, path, _MAX_PATH);
58 return resolved_path;
59}
bellard67b915a2004-03-31 23:37:16 +000060#endif
bellard8a7ddc32004-03-31 19:00:16 +000061
bellardea2384d2004-08-01 21:59:26 +000062#ifdef QEMU_TOOL
63
64/* we use QEMU_TOOL in the command line tools which do not depend on
65 the target CPU type */
66#include "config-host.h"
67#include <setjmp.h>
68#include "osdep.h"
69#include "bswap.h"
70
71#else
72
bellard16f62432004-02-25 23:25:55 +000073#include "cpu.h"
bellard1fddef42005-04-17 19:16:13 +000074#include "gdbstub.h"
bellard16f62432004-02-25 23:25:55 +000075
bellardea2384d2004-08-01 21:59:26 +000076#endif /* !defined(QEMU_TOOL) */
77
bellard67b915a2004-03-31 23:37:16 +000078#ifndef glue
79#define xglue(x, y) x ## y
80#define glue(x, y) xglue(x, y)
81#define stringify(s) tostring(s)
82#define tostring(s) #s
83#endif
84
bellard33e39632003-07-06 17:15:21 +000085/* vl.c */
bellard80cabfa2004-03-14 12:20:30 +000086uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
bellard313aa562003-08-10 21:52:11 +000087
bellard80cabfa2004-03-14 12:20:30 +000088void hw_error(const char *fmt, ...);
89
bellard7587cf42004-06-20 13:43:27 +000090int get_image_size(const char *filename);
bellard80cabfa2004-03-14 12:20:30 +000091int load_image(const char *filename, uint8_t *addr);
92extern const char *bios_dir;
93
94void pstrcpy(char *buf, int buf_size, const char *str);
95char *pstrcat(char *buf, int buf_size, const char *s);
bellard82c643f2004-07-14 17:28:13 +000096int strstart(const char *str, const char *val, const char **ptr);
bellardc4b1fcc2004-03-14 21:44:30 +000097
bellard8a7ddc32004-03-31 19:00:16 +000098extern int vm_running;
99
bellard0bd48852005-11-11 00:00:47 +0000100typedef struct vm_change_state_entry VMChangeStateEntry;
101typedef void VMChangeStateHandler(void *opaque, int running);
bellard8a7ddc32004-03-31 19:00:16 +0000102typedef void VMStopHandler(void *opaque, int reason);
103
bellard0bd48852005-11-11 00:00:47 +0000104VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
105 void *opaque);
106void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
107
bellard8a7ddc32004-03-31 19:00:16 +0000108int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
109void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
110
111void vm_start(void);
112void vm_stop(int reason);
113
bellardbb0c6722004-06-20 12:37:32 +0000114typedef void QEMUResetHandler(void *opaque);
115
116void qemu_register_reset(QEMUResetHandler *func, void *opaque);
117void qemu_system_reset_request(void);
118void qemu_system_shutdown_request(void);
bellard34751872005-07-02 14:31:34 +0000119void qemu_system_powerdown_request(void);
120#if !defined(TARGET_SPARC)
121// Please implement a power failure function to signal the OS
122#define qemu_system_powerdown() do{}while(0)
123#else
124void qemu_system_powerdown(void);
125#endif
bellardbb0c6722004-06-20 12:37:32 +0000126
bellardea2384d2004-08-01 21:59:26 +0000127void main_loop_wait(int timeout);
128
bellardaaaa7df2004-04-26 20:56:53 +0000129extern int audio_enabled;
bellardfb065182004-11-09 23:09:44 +0000130extern int sb16_enabled;
131extern int adlib_enabled;
132extern int gus_enabled;
bellard1d14ffa2005-10-30 18:58:22 +0000133extern int es1370_enabled;
bellard0ced6582004-05-23 21:06:12 +0000134extern int ram_size;
135extern int bios_size;
bellardee22c2f2004-06-03 12:49:50 +0000136extern int rtc_utc;
bellard1f042752004-06-05 13:46:47 +0000137extern int cirrus_vga_enabled;
bellard28b9b5a2004-06-21 16:46:35 +0000138extern int graphic_width;
139extern int graphic_height;
140extern int graphic_depth;
bellard3d11d0e2004-12-12 16:56:30 +0000141extern const char *keyboard_layout;
bellardd993e022005-02-10 22:00:06 +0000142extern int kqemu_allowed;
bellarda09db212005-04-30 16:10:35 +0000143extern int win2k_install_hack;
bellardbb36d472005-11-05 14:22:28 +0000144extern int usb_enabled;
bellard0ced6582004-05-23 21:06:12 +0000145
146/* XXX: make it dynamic */
147#if defined (TARGET_PPC)
bellardd5295252005-07-03 14:00:51 +0000148#define BIOS_SIZE ((512 + 32) * 1024)
bellard6af0bf92005-07-02 14:58:51 +0000149#elif defined(TARGET_MIPS)
150#define BIOS_SIZE (128 * 1024)
bellard0ced6582004-05-23 21:06:12 +0000151#else
bellard7587cf42004-06-20 13:43:27 +0000152#define BIOS_SIZE ((256 + 64) * 1024)
bellard0ced6582004-05-23 21:06:12 +0000153#endif
bellardaaaa7df2004-04-26 20:56:53 +0000154
bellard63066f42004-06-03 18:45:02 +0000155/* keyboard/mouse support */
156
157#define MOUSE_EVENT_LBUTTON 0x01
158#define MOUSE_EVENT_RBUTTON 0x02
159#define MOUSE_EVENT_MBUTTON 0x04
160
161typedef void QEMUPutKBDEvent(void *opaque, int keycode);
162typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
163
164void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
165void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque);
166
167void kbd_put_keycode(int keycode);
168void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
169
bellard82c643f2004-07-14 17:28:13 +0000170/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
171 constants) */
172#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
173#define QEMU_KEY_BACKSPACE 0x007f
174#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
175#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
176#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
177#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
178#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
179#define QEMU_KEY_END QEMU_KEY_ESC1(4)
180#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
181#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
182#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
183
184#define QEMU_KEY_CTRL_UP 0xe400
185#define QEMU_KEY_CTRL_DOWN 0xe401
186#define QEMU_KEY_CTRL_LEFT 0xe402
187#define QEMU_KEY_CTRL_RIGHT 0xe403
188#define QEMU_KEY_CTRL_HOME 0xe404
189#define QEMU_KEY_CTRL_END 0xe405
190#define QEMU_KEY_CTRL_PAGEUP 0xe406
191#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
192
193void kbd_put_keysym(int keysym);
194
bellardc4b1fcc2004-03-14 21:44:30 +0000195/* async I/O support */
196
197typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
198typedef int IOCanRWHandler(void *opaque);
bellard7c9d8e02005-11-15 22:16:05 +0000199typedef void IOHandler(void *opaque);
bellardc4b1fcc2004-03-14 21:44:30 +0000200
bellard7c9d8e02005-11-15 22:16:05 +0000201int qemu_set_fd_handler2(int fd,
202 IOCanRWHandler *fd_read_poll,
203 IOHandler *fd_read,
204 IOHandler *fd_write,
205 void *opaque);
206int qemu_set_fd_handler(int fd,
207 IOHandler *fd_read,
208 IOHandler *fd_write,
209 void *opaque);
bellard8a7ddc32004-03-31 19:00:16 +0000210
bellard82c643f2004-07-14 17:28:13 +0000211/* character device */
212
213#define CHR_EVENT_BREAK 0 /* serial break char */
bellardea2384d2004-08-01 21:59:26 +0000214#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
bellard82c643f2004-07-14 17:28:13 +0000215
bellard2122c512005-11-10 23:58:33 +0000216
217
218#define CHR_IOCTL_SERIAL_SET_PARAMS 1
219typedef struct {
220 int speed;
221 int parity;
222 int data_bits;
223 int stop_bits;
224} QEMUSerialSetParams;
225
226#define CHR_IOCTL_SERIAL_SET_BREAK 2
227
228#define CHR_IOCTL_PP_READ_DATA 3
229#define CHR_IOCTL_PP_WRITE_DATA 4
230#define CHR_IOCTL_PP_READ_CONTROL 5
231#define CHR_IOCTL_PP_WRITE_CONTROL 6
232#define CHR_IOCTL_PP_READ_STATUS 7
233
bellard82c643f2004-07-14 17:28:13 +0000234typedef void IOEventHandler(void *opaque, int event);
235
236typedef struct CharDriverState {
237 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
238 void (*chr_add_read_handler)(struct CharDriverState *s,
239 IOCanRWHandler *fd_can_read,
240 IOReadHandler *fd_read, void *opaque);
bellard2122c512005-11-10 23:58:33 +0000241 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
bellard82c643f2004-07-14 17:28:13 +0000242 IOEventHandler *chr_event;
bellardeb45f5f2004-09-18 19:33:09 +0000243 void (*chr_send_event)(struct CharDriverState *chr, int event);
bellard82c643f2004-07-14 17:28:13 +0000244 void *opaque;
245} CharDriverState;
246
247void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
248int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
bellardea2384d2004-08-01 21:59:26 +0000249void qemu_chr_send_event(CharDriverState *s, int event);
bellard82c643f2004-07-14 17:28:13 +0000250void qemu_chr_add_read_handler(CharDriverState *s,
251 IOCanRWHandler *fd_can_read,
252 IOReadHandler *fd_read, void *opaque);
253void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
bellard2122c512005-11-10 23:58:33 +0000254int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
bellardf8d179e2005-11-08 22:30:36 +0000255
bellard82c643f2004-07-14 17:28:13 +0000256/* consoles */
257
258typedef struct DisplayState DisplayState;
259typedef struct TextConsole TextConsole;
260
261extern TextConsole *vga_console;
262
263TextConsole *graphic_console_init(DisplayState *ds);
264int is_active_console(TextConsole *s);
265CharDriverState *text_console_init(DisplayState *ds);
266void console_select(unsigned int index);
267
bellard8d11df92004-08-24 21:13:40 +0000268/* serial ports */
269
270#define MAX_SERIAL_PORTS 4
271
272extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
273
bellard6508fe52005-01-15 12:02:56 +0000274/* parallel ports */
275
276#define MAX_PARALLEL_PORTS 3
277
278extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
279
bellard7c9d8e02005-11-15 22:16:05 +0000280/* VLANs support */
281
282typedef struct VLANClientState VLANClientState;
283
284struct VLANClientState {
285 IOReadHandler *fd_read;
286 void *opaque;
287 struct VLANClientState *next;
288 struct VLANState *vlan;
289 char info_str[256];
290};
291
292typedef struct VLANState {
293 int id;
294 VLANClientState *first_client;
295 struct VLANState *next;
296} VLANState;
297
298VLANState *qemu_find_vlan(int id);
299VLANClientState *qemu_new_vlan_client(VLANState *vlan,
300 IOReadHandler *fd_read, void *opaque);
301void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
302
303void do_info_network(void);
304
305/* NIC info */
bellardc20709a2004-04-21 23:27:19 +0000306
307#define MAX_NICS 8
308
bellard7c9d8e02005-11-15 22:16:05 +0000309typedef struct NICInfo {
bellardc20709a2004-04-21 23:27:19 +0000310 uint8_t macaddr[6];
bellard7c9d8e02005-11-15 22:16:05 +0000311 VLANState *vlan;
312} NICInfo;
bellardc20709a2004-04-21 23:27:19 +0000313
314extern int nb_nics;
bellard7c9d8e02005-11-15 22:16:05 +0000315extern NICInfo nd_table[MAX_NICS];
bellardc20709a2004-04-21 23:27:19 +0000316
bellard8a7ddc32004-03-31 19:00:16 +0000317/* timers */
318
319typedef struct QEMUClock QEMUClock;
320typedef struct QEMUTimer QEMUTimer;
321typedef void QEMUTimerCB(void *opaque);
322
323/* The real time clock should be used only for stuff which does not
324 change the virtual machine state, as it is run even if the virtual
bellard69b91032004-05-18 23:05:28 +0000325 machine is stopped. The real time clock has a frequency of 1000
bellard8a7ddc32004-03-31 19:00:16 +0000326 Hz. */
327extern QEMUClock *rt_clock;
328
bellarde80cfcf2004-12-19 23:18:01 +0000329/* The virtual clock is only run during the emulation. It is stopped
bellard8a7ddc32004-03-31 19:00:16 +0000330 when the virtual machine is stopped. Virtual timers use a high
331 precision clock, usually cpu cycles (use ticks_per_sec). */
332extern QEMUClock *vm_clock;
333
334int64_t qemu_get_clock(QEMUClock *clock);
335
336QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
337void qemu_free_timer(QEMUTimer *ts);
338void qemu_del_timer(QEMUTimer *ts);
339void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
340int qemu_timer_pending(QEMUTimer *ts);
341
342extern int64_t ticks_per_sec;
343extern int pit_min_timer_count;
344
345void cpu_enable_ticks(void);
346void cpu_disable_ticks(void);
347
348/* VM Load/Save */
349
350typedef FILE QEMUFile;
351
352void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
353void qemu_put_byte(QEMUFile *f, int v);
354void qemu_put_be16(QEMUFile *f, unsigned int v);
355void qemu_put_be32(QEMUFile *f, unsigned int v);
356void qemu_put_be64(QEMUFile *f, uint64_t v);
357int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
358int qemu_get_byte(QEMUFile *f);
359unsigned int qemu_get_be16(QEMUFile *f);
360unsigned int qemu_get_be32(QEMUFile *f);
361uint64_t qemu_get_be64(QEMUFile *f);
362
363static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
364{
365 qemu_put_be64(f, *pv);
366}
367
368static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
369{
370 qemu_put_be32(f, *pv);
371}
372
373static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
374{
375 qemu_put_be16(f, *pv);
376}
377
378static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
379{
380 qemu_put_byte(f, *pv);
381}
382
383static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
384{
385 *pv = qemu_get_be64(f);
386}
387
388static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
389{
390 *pv = qemu_get_be32(f);
391}
392
393static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
394{
395 *pv = qemu_get_be16(f);
396}
397
398static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
399{
400 *pv = qemu_get_byte(f);
401}
402
bellardc27004e2005-01-03 23:35:10 +0000403#if TARGET_LONG_BITS == 64
404#define qemu_put_betl qemu_put_be64
405#define qemu_get_betl qemu_get_be64
406#define qemu_put_betls qemu_put_be64s
407#define qemu_get_betls qemu_get_be64s
408#else
409#define qemu_put_betl qemu_put_be32
410#define qemu_get_betl qemu_get_be32
411#define qemu_put_betls qemu_put_be32s
412#define qemu_get_betls qemu_get_be32s
413#endif
414
bellard8a7ddc32004-03-31 19:00:16 +0000415int64_t qemu_ftell(QEMUFile *f);
416int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
417
418typedef void SaveStateHandler(QEMUFile *f, void *opaque);
419typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
420
421int qemu_loadvm(const char *filename);
422int qemu_savevm(const char *filename);
423int register_savevm(const char *idstr,
424 int instance_id,
425 int version_id,
426 SaveStateHandler *save_state,
427 LoadStateHandler *load_state,
428 void *opaque);
429void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
430void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
bellardc4b1fcc2004-03-14 21:44:30 +0000431
bellardfc01f7e2003-06-30 10:03:06 +0000432/* block.c */
433typedef struct BlockDriverState BlockDriverState;
bellardea2384d2004-08-01 21:59:26 +0000434typedef struct BlockDriver BlockDriver;
bellardfc01f7e2003-06-30 10:03:06 +0000435
bellardea2384d2004-08-01 21:59:26 +0000436extern BlockDriver bdrv_raw;
437extern BlockDriver bdrv_cow;
438extern BlockDriver bdrv_qcow;
439extern BlockDriver bdrv_vmdk;
bellard3c565212004-09-29 21:29:14 +0000440extern BlockDriver bdrv_cloop;
bellard585d0ed2004-12-12 11:24:44 +0000441extern BlockDriver bdrv_dmg;
bellarda8753c32005-04-26 21:34:00 +0000442extern BlockDriver bdrv_bochs;
bellard6a0f9e82005-04-27 20:17:58 +0000443extern BlockDriver bdrv_vpc;
bellardde167e42005-04-28 21:15:08 +0000444extern BlockDriver bdrv_vvfat;
bellardea2384d2004-08-01 21:59:26 +0000445
446void bdrv_init(void);
447BlockDriver *bdrv_find_format(const char *format_name);
448int bdrv_create(BlockDriver *drv,
449 const char *filename, int64_t size_in_sectors,
450 const char *backing_file, int flags);
bellardc4b1fcc2004-03-14 21:44:30 +0000451BlockDriverState *bdrv_new(const char *device_name);
452void bdrv_delete(BlockDriverState *bs);
453int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot);
bellardea2384d2004-08-01 21:59:26 +0000454int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot,
455 BlockDriver *drv);
bellardfc01f7e2003-06-30 10:03:06 +0000456void bdrv_close(BlockDriverState *bs);
457int bdrv_read(BlockDriverState *bs, int64_t sector_num,
458 uint8_t *buf, int nb_sectors);
459int bdrv_write(BlockDriverState *bs, int64_t sector_num,
460 const uint8_t *buf, int nb_sectors);
461void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
bellard33e39632003-07-06 17:15:21 +0000462int bdrv_commit(BlockDriverState *bs);
bellard77fef8c2004-02-16 22:05:46 +0000463void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
bellardfc01f7e2003-06-30 10:03:06 +0000464
bellardc4b1fcc2004-03-14 21:44:30 +0000465#define BDRV_TYPE_HD 0
466#define BDRV_TYPE_CDROM 1
467#define BDRV_TYPE_FLOPPY 2
bellard46d47672004-11-16 01:45:27 +0000468#define BIOS_ATA_TRANSLATION_AUTO 0
469#define BIOS_ATA_TRANSLATION_NONE 1
470#define BIOS_ATA_TRANSLATION_LBA 2
bellardc4b1fcc2004-03-14 21:44:30 +0000471
472void bdrv_set_geometry_hint(BlockDriverState *bs,
473 int cyls, int heads, int secs);
474void bdrv_set_type_hint(BlockDriverState *bs, int type);
bellard46d47672004-11-16 01:45:27 +0000475void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
bellardc4b1fcc2004-03-14 21:44:30 +0000476void bdrv_get_geometry_hint(BlockDriverState *bs,
477 int *pcyls, int *pheads, int *psecs);
478int bdrv_get_type_hint(BlockDriverState *bs);
bellard46d47672004-11-16 01:45:27 +0000479int bdrv_get_translation_hint(BlockDriverState *bs);
bellardc4b1fcc2004-03-14 21:44:30 +0000480int bdrv_is_removable(BlockDriverState *bs);
481int bdrv_is_read_only(BlockDriverState *bs);
482int bdrv_is_inserted(BlockDriverState *bs);
483int bdrv_is_locked(BlockDriverState *bs);
484void bdrv_set_locked(BlockDriverState *bs, int locked);
485void bdrv_set_change_cb(BlockDriverState *bs,
486 void (*change_cb)(void *opaque), void *opaque);
bellardea2384d2004-08-01 21:59:26 +0000487void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
bellardc4b1fcc2004-03-14 21:44:30 +0000488void bdrv_info(void);
489BlockDriverState *bdrv_find(const char *name);
bellard82c643f2004-07-14 17:28:13 +0000490void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
bellardea2384d2004-08-01 21:59:26 +0000491int bdrv_is_encrypted(BlockDriverState *bs);
492int bdrv_set_key(BlockDriverState *bs, const char *key);
493void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
494 void *opaque);
495const char *bdrv_get_device_name(BlockDriverState *bs);
bellardc4b1fcc2004-03-14 21:44:30 +0000496
bellardea2384d2004-08-01 21:59:26 +0000497int qcow_get_cluster_size(BlockDriverState *bs);
498int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num,
499 const uint8_t *buf);
500
501#ifndef QEMU_TOOL
bellard54fa5af2005-06-05 14:50:39 +0000502
503typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
504 int boot_device,
505 DisplayState *ds, const char **fd_filename, int snapshot,
506 const char *kernel_filename, const char *kernel_cmdline,
507 const char *initrd_filename);
508
509typedef struct QEMUMachine {
510 const char *name;
511 const char *desc;
512 QEMUMachineInitFunc *init;
513 struct QEMUMachine *next;
514} QEMUMachine;
515
516int qemu_register_machine(QEMUMachine *m);
517
518typedef void SetIRQFunc(void *opaque, int irq_num, int level);
bellard3de388f2005-07-02 18:11:44 +0000519typedef void IRQRequestFunc(void *opaque, int level);
bellard54fa5af2005-06-05 14:50:39 +0000520
bellard26aa7d72004-04-28 22:26:05 +0000521/* ISA bus */
522
523extern target_phys_addr_t isa_mem_base;
524
525typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
526typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
527
528int register_ioport_read(int start, int length, int size,
529 IOPortReadFunc *func, void *opaque);
530int register_ioport_write(int start, int length, int size,
531 IOPortWriteFunc *func, void *opaque);
bellard69b91032004-05-18 23:05:28 +0000532void isa_unassign_ioport(int start, int length);
533
534/* PCI bus */
535
bellard69b91032004-05-18 23:05:28 +0000536extern target_phys_addr_t pci_mem_base;
537
bellard46e50e92004-06-21 19:43:00 +0000538typedef struct PCIBus PCIBus;
bellard69b91032004-05-18 23:05:28 +0000539typedef struct PCIDevice PCIDevice;
540
541typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
542 uint32_t address, uint32_t data, int len);
543typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
544 uint32_t address, int len);
545typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
546 uint32_t addr, uint32_t size, int type);
547
548#define PCI_ADDRESS_SPACE_MEM 0x00
549#define PCI_ADDRESS_SPACE_IO 0x01
550#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
551
552typedef struct PCIIORegion {
bellard5768f5a2004-05-20 12:47:45 +0000553 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
bellard69b91032004-05-18 23:05:28 +0000554 uint32_t size;
555 uint8_t type;
556 PCIMapIORegionFunc *map_func;
557} PCIIORegion;
558
bellard8a8696a2004-06-03 14:06:32 +0000559#define PCI_ROM_SLOT 6
560#define PCI_NUM_REGIONS 7
bellard69b91032004-05-18 23:05:28 +0000561struct PCIDevice {
562 /* PCI config space */
563 uint8_t config[256];
564
565 /* the following fields are read only */
bellard46e50e92004-06-21 19:43:00 +0000566 PCIBus *bus;
bellard69b91032004-05-18 23:05:28 +0000567 int devfn;
568 char name[64];
bellard8a8696a2004-06-03 14:06:32 +0000569 PCIIORegion io_regions[PCI_NUM_REGIONS];
bellard69b91032004-05-18 23:05:28 +0000570
571 /* do not access the following fields */
572 PCIConfigReadFunc *config_read;
573 PCIConfigWriteFunc *config_write;
bellard5768f5a2004-05-20 12:47:45 +0000574 int irq_index;
bellard69b91032004-05-18 23:05:28 +0000575};
576
bellard46e50e92004-06-21 19:43:00 +0000577PCIDevice *pci_register_device(PCIBus *bus, const char *name,
578 int instance_size, int devfn,
bellard69b91032004-05-18 23:05:28 +0000579 PCIConfigReadFunc *config_read,
580 PCIConfigWriteFunc *config_write);
581
582void pci_register_io_region(PCIDevice *pci_dev, int region_num,
583 uint32_t size, int type,
584 PCIMapIORegionFunc *map_func);
585
bellard5768f5a2004-05-20 12:47:45 +0000586void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
587
588uint32_t pci_default_read_config(PCIDevice *d,
589 uint32_t address, int len);
590void pci_default_write_config(PCIDevice *d,
591 uint32_t address, uint32_t val, int len);
bellard30ca2aa2004-10-03 13:56:00 +0000592void generic_pci_save(QEMUFile* f, void *opaque);
593int generic_pci_load(QEMUFile* f, void *opaque, int version_id);
bellard5768f5a2004-05-20 12:47:45 +0000594
bellard9995c512004-05-23 19:09:22 +0000595extern struct PIIX3State *piix3_state;
596
bellard46e50e92004-06-21 19:43:00 +0000597PCIBus *i440fx_init(void);
598void piix3_init(PCIBus *bus);
bellard69b91032004-05-18 23:05:28 +0000599void pci_bios_init(void);
bellard5768f5a2004-05-20 12:47:45 +0000600void pci_info(void);
bellard26aa7d72004-04-28 22:26:05 +0000601
bellard77d4bc32004-05-26 22:13:53 +0000602/* temporary: will be moved in platform specific file */
bellard54fa5af2005-06-05 14:50:39 +0000603void pci_set_pic(PCIBus *bus, SetIRQFunc *set_irq, void *irq_opaque);
bellard46e50e92004-06-21 19:43:00 +0000604PCIBus *pci_prep_init(void);
bellard54fa5af2005-06-05 14:50:39 +0000605PCIBus *pci_grackle_init(uint32_t base);
bellard46e50e92004-06-21 19:43:00 +0000606PCIBus *pci_pmac_init(void);
bellard83469012005-07-23 14:27:54 +0000607PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base);
bellard77d4bc32004-05-26 22:13:53 +0000608
bellard28b9b5a2004-06-21 16:46:35 +0000609/* openpic.c */
610typedef struct openpic_t openpic_t;
bellard54fa5af2005-06-05 14:50:39 +0000611void openpic_set_irq(void *opaque, int n_IRQ, int level);
bellarde2733d22004-06-21 22:46:10 +0000612openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus);
bellard28b9b5a2004-06-21 16:46:35 +0000613
bellard54fa5af2005-06-05 14:50:39 +0000614/* heathrow_pic.c */
615typedef struct HeathrowPICS HeathrowPICS;
616void heathrow_pic_set_irq(void *opaque, int num, int level);
617HeathrowPICS *heathrow_pic_init(int *pmem_index);
618
bellard313aa562003-08-10 21:52:11 +0000619/* vga.c */
620
bellard4fa0f5d2004-02-06 19:47:52 +0000621#define VGA_RAM_SIZE (4096 * 1024)
bellard313aa562003-08-10 21:52:11 +0000622
bellard82c643f2004-07-14 17:28:13 +0000623struct DisplayState {
bellard313aa562003-08-10 21:52:11 +0000624 uint8_t *data;
625 int linesize;
626 int depth;
bellard82c643f2004-07-14 17:28:13 +0000627 int width;
628 int height;
bellard313aa562003-08-10 21:52:11 +0000629 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
630 void (*dpy_resize)(struct DisplayState *s, int w, int h);
631 void (*dpy_refresh)(struct DisplayState *s);
bellard82c643f2004-07-14 17:28:13 +0000632};
bellard313aa562003-08-10 21:52:11 +0000633
634static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
635{
636 s->dpy_update(s, x, y, w, h);
637}
638
639static inline void dpy_resize(DisplayState *s, int w, int h)
640{
641 s->dpy_resize(s, w, h);
642}
643
bellard46e50e92004-06-21 19:43:00 +0000644int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
bellardd5295252005-07-03 14:00:51 +0000645 unsigned long vga_ram_offset, int vga_ram_size,
646 unsigned long vga_bios_offset, int vga_bios_size);
bellard313aa562003-08-10 21:52:11 +0000647void vga_update_display(void);
bellardee38b4c2004-06-08 00:56:42 +0000648void vga_invalidate_display(void);
bellard59a983b2004-03-17 23:17:16 +0000649void vga_screen_dump(const char *filename);
bellard313aa562003-08-10 21:52:11 +0000650
bellardd6bfa222004-06-05 10:32:30 +0000651/* cirrus_vga.c */
bellard46e50e92004-06-21 19:43:00 +0000652void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
bellardd6bfa222004-06-05 10:32:30 +0000653 unsigned long vga_ram_offset, int vga_ram_size);
bellardd6bfa222004-06-05 10:32:30 +0000654void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
655 unsigned long vga_ram_offset, int vga_ram_size);
656
bellard313aa562003-08-10 21:52:11 +0000657/* sdl.c */
bellardd63d3072004-10-03 13:29:03 +0000658void sdl_display_init(DisplayState *ds, int full_screen);
bellard313aa562003-08-10 21:52:11 +0000659
bellardda4dbf72005-03-02 22:22:43 +0000660/* cocoa.m */
661void cocoa_display_init(DisplayState *ds, int full_screen);
662
bellard5391d802003-11-11 13:48:59 +0000663/* ide.c */
664#define MAX_DISKS 4
665
666extern BlockDriverState *bs_table[MAX_DISKS];
667
bellard69b91032004-05-18 23:05:28 +0000668void isa_ide_init(int iobase, int iobase2, int irq,
669 BlockDriverState *hd0, BlockDriverState *hd1);
bellard54fa5af2005-06-05 14:50:39 +0000670void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
671 int secondary_ide_enabled);
bellard46e50e92004-06-21 19:43:00 +0000672void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table);
bellard28b9b5a2004-06-21 16:46:35 +0000673int pmac_ide_init (BlockDriverState **hd_table,
bellard54fa5af2005-06-05 14:50:39 +0000674 SetIRQFunc *set_irq, void *irq_opaque, int irq);
bellard5391d802003-11-11 13:48:59 +0000675
bellard1d14ffa2005-10-30 18:58:22 +0000676/* es1370.c */
bellardc0fe3822005-11-05 18:55:28 +0000677int es1370_init (PCIBus *bus, AudioState *s);
bellard1d14ffa2005-10-30 18:58:22 +0000678
bellardfb065182004-11-09 23:09:44 +0000679/* sb16.c */
bellardc0fe3822005-11-05 18:55:28 +0000680int SB16_init (AudioState *s);
bellardfb065182004-11-09 23:09:44 +0000681
682/* adlib.c */
bellardc0fe3822005-11-05 18:55:28 +0000683int Adlib_init (AudioState *s);
bellardfb065182004-11-09 23:09:44 +0000684
685/* gus.c */
bellardc0fe3822005-11-05 18:55:28 +0000686int GUS_init (AudioState *s);
bellard27503322003-11-13 01:46:15 +0000687
688/* dma.c */
bellard85571bc2004-11-07 18:04:02 +0000689typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
bellard27503322003-11-13 01:46:15 +0000690int DMA_get_channel_mode (int nchan);
bellard85571bc2004-11-07 18:04:02 +0000691int DMA_read_memory (int nchan, void *buf, int pos, int size);
692int DMA_write_memory (int nchan, void *buf, int pos, int size);
bellard27503322003-11-13 01:46:15 +0000693void DMA_hold_DREQ (int nchan);
694void DMA_release_DREQ (int nchan);
bellard16f62432004-02-25 23:25:55 +0000695void DMA_schedule(int nchan);
bellard27503322003-11-13 01:46:15 +0000696void DMA_run (void);
bellard28b9b5a2004-06-21 16:46:35 +0000697void DMA_init (int high_page_enable);
bellard27503322003-11-13 01:46:15 +0000698void DMA_register_channel (int nchan,
bellard85571bc2004-11-07 18:04:02 +0000699 DMA_transfer_handler transfer_handler,
700 void *opaque);
bellard7138fcf2004-01-05 00:02:28 +0000701/* fdc.c */
702#define MAX_FD 2
703extern BlockDriverState *fd_table[MAX_FD];
704
bellardbaca51f2004-03-19 23:05:34 +0000705typedef struct fdctrl_t fdctrl_t;
706
707fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
708 uint32_t io_base,
709 BlockDriverState **fds);
710int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
bellard7138fcf2004-01-05 00:02:28 +0000711
bellard80cabfa2004-03-14 12:20:30 +0000712/* ne2000.c */
713
bellard7c9d8e02005-11-15 22:16:05 +0000714void isa_ne2000_init(int base, int irq, NICInfo *nd);
715void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
bellard80cabfa2004-03-14 12:20:30 +0000716
717/* pckbd.c */
718
bellard80cabfa2004-03-14 12:20:30 +0000719void kbd_init(void);
720
721/* mc146818rtc.c */
722
bellard8a7ddc32004-03-31 19:00:16 +0000723typedef struct RTCState RTCState;
bellard80cabfa2004-03-14 12:20:30 +0000724
bellard8a7ddc32004-03-31 19:00:16 +0000725RTCState *rtc_init(int base, int irq);
726void rtc_set_memory(RTCState *s, int addr, int val);
727void rtc_set_date(RTCState *s, const struct tm *tm);
bellard80cabfa2004-03-14 12:20:30 +0000728
729/* serial.c */
730
bellardc4b1fcc2004-03-14 21:44:30 +0000731typedef struct SerialState SerialState;
bellard82c643f2004-07-14 17:28:13 +0000732SerialState *serial_init(int base, int irq, CharDriverState *chr);
bellard80cabfa2004-03-14 12:20:30 +0000733
bellard6508fe52005-01-15 12:02:56 +0000734/* parallel.c */
735
736typedef struct ParallelState ParallelState;
737ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
738
bellard80cabfa2004-03-14 12:20:30 +0000739/* i8259.c */
740
bellard3de388f2005-07-02 18:11:44 +0000741typedef struct PicState2 PicState2;
742extern PicState2 *isa_pic;
bellard80cabfa2004-03-14 12:20:30 +0000743void pic_set_irq(int irq, int level);
bellard54fa5af2005-06-05 14:50:39 +0000744void pic_set_irq_new(void *opaque, int irq, int level);
bellard3de388f2005-07-02 18:11:44 +0000745PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
bellardd592d302005-07-23 19:05:37 +0000746void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
747 void *alt_irq_opaque);
bellard3de388f2005-07-02 18:11:44 +0000748int pic_read_irq(PicState2 *s);
749void pic_update_irq(PicState2 *s);
750uint32_t pic_intack_read(PicState2 *s);
bellardc20709a2004-04-21 23:27:19 +0000751void pic_info(void);
bellard4a0fb712004-05-21 11:39:07 +0000752void irq_info(void);
bellard80cabfa2004-03-14 12:20:30 +0000753
bellardc27004e2005-01-03 23:35:10 +0000754/* APIC */
bellardd592d302005-07-23 19:05:37 +0000755typedef struct IOAPICState IOAPICState;
756
bellardc27004e2005-01-03 23:35:10 +0000757int apic_init(CPUState *env);
758int apic_get_interrupt(CPUState *env);
bellardd592d302005-07-23 19:05:37 +0000759IOAPICState *ioapic_init(void);
760void ioapic_set_irq(void *opaque, int vector, int level);
bellardc27004e2005-01-03 23:35:10 +0000761
bellard80cabfa2004-03-14 12:20:30 +0000762/* i8254.c */
763
764#define PIT_FREQ 1193182
765
bellardec844b92004-05-03 23:18:25 +0000766typedef struct PITState PITState;
bellard80cabfa2004-03-14 12:20:30 +0000767
bellardec844b92004-05-03 23:18:25 +0000768PITState *pit_init(int base, int irq);
769void pit_set_gate(PITState *pit, int channel, int val);
770int pit_get_gate(PITState *pit, int channel);
771int pit_get_out(PITState *pit, int channel, int64_t current_time);
bellard80cabfa2004-03-14 12:20:30 +0000772
773/* pc.c */
bellard54fa5af2005-06-05 14:50:39 +0000774extern QEMUMachine pc_machine;
bellard3dbbdc22005-11-06 18:20:37 +0000775extern QEMUMachine isapc_machine;
bellard80cabfa2004-03-14 12:20:30 +0000776
bellard26aa7d72004-04-28 22:26:05 +0000777/* ppc.c */
bellard54fa5af2005-06-05 14:50:39 +0000778extern QEMUMachine prep_machine;
779extern QEMUMachine core99_machine;
780extern QEMUMachine heathrow_machine;
781
bellard6af0bf92005-07-02 14:58:51 +0000782/* mips_r4k.c */
783extern QEMUMachine mips_machine;
784
bellard8cc43fe2004-05-26 23:29:15 +0000785#ifdef TARGET_PPC
786ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
787#endif
bellard64201202004-05-26 22:55:16 +0000788void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
bellard77d4bc32004-05-26 22:13:53 +0000789
790extern CPUWriteMemoryFunc *PPC_io_write[];
791extern CPUReadMemoryFunc *PPC_io_read[];
bellard54fa5af2005-06-05 14:50:39 +0000792void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
bellard26aa7d72004-04-28 22:26:05 +0000793
bellarde95c8d52004-09-30 22:22:08 +0000794/* sun4m.c */
bellard54fa5af2005-06-05 14:50:39 +0000795extern QEMUMachine sun4m_machine;
bellarde80cfcf2004-12-19 23:18:01 +0000796uint32_t iommu_translate(uint32_t addr);
bellarde95c8d52004-09-30 22:22:08 +0000797
798/* iommu.c */
bellarde80cfcf2004-12-19 23:18:01 +0000799void *iommu_init(uint32_t addr);
800uint32_t iommu_translate_local(void *opaque, uint32_t addr);
bellarde95c8d52004-09-30 22:22:08 +0000801
802/* lance.c */
bellard7c9d8e02005-11-15 22:16:05 +0000803void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr);
bellarde95c8d52004-09-30 22:22:08 +0000804
805/* tcx.c */
bellarde80cfcf2004-12-19 23:18:01 +0000806void *tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
bellard6f7e9ae2005-03-13 09:43:36 +0000807 unsigned long vram_offset, int vram_size, int width, int height);
bellarde80cfcf2004-12-19 23:18:01 +0000808void tcx_update_display(void *opaque);
809void tcx_invalidate_display(void *opaque);
810void tcx_screen_dump(void *opaque, const char *filename);
bellarde95c8d52004-09-30 22:22:08 +0000811
bellarde80cfcf2004-12-19 23:18:01 +0000812/* slavio_intctl.c */
813void *slavio_intctl_init();
814void slavio_pic_info(void *opaque);
815void slavio_irq_info(void *opaque);
816void slavio_pic_set_irq(void *opaque, int irq, int level);
bellarde95c8d52004-09-30 22:22:08 +0000817
818/* magic-load.c */
bellarde80cfcf2004-12-19 23:18:01 +0000819int load_elf(const char *filename, uint8_t *addr);
820int load_aout(const char *filename, uint8_t *addr);
bellard8d5f07f2004-10-04 21:23:09 +0000821
bellarde80cfcf2004-12-19 23:18:01 +0000822/* slavio_timer.c */
823void slavio_timer_init(uint32_t addr1, int irq1, uint32_t addr2, int irq2);
824
825/* slavio_serial.c */
826SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
827void slavio_serial_ms_kbd_init(int base, int irq);
bellarde95c8d52004-09-30 22:22:08 +0000828
bellard34751872005-07-02 14:31:34 +0000829/* slavio_misc.c */
830void *slavio_misc_init(uint32_t base, int irq);
831void slavio_set_power_fail(void *opaque, int power_failing);
832
bellard6f7e9ae2005-03-13 09:43:36 +0000833/* esp.c */
834void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr);
835
bellard34751872005-07-02 14:31:34 +0000836/* sun4u.c */
837extern QEMUMachine sun4u_machine;
838
bellard64201202004-05-26 22:55:16 +0000839/* NVRAM helpers */
840#include "hw/m48t59.h"
841
842void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
843uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
844void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
845uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
846void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
847uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
848void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
849 const unsigned char *str, uint32_t max);
850int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
851void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
852 uint32_t start, uint32_t count);
853int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
854 const unsigned char *arch,
855 uint32_t RAM_size, int boot_device,
856 uint32_t kernel_image, uint32_t kernel_size,
bellard28b9b5a2004-06-21 16:46:35 +0000857 const char *cmdline,
bellard64201202004-05-26 22:55:16 +0000858 uint32_t initrd_image, uint32_t initrd_size,
bellard28b9b5a2004-06-21 16:46:35 +0000859 uint32_t NVRAM_image,
860 int width, int height, int depth);
bellard64201202004-05-26 22:55:16 +0000861
bellard63066f42004-06-03 18:45:02 +0000862/* adb.c */
863
864#define MAX_ADB_DEVICES 16
865
bellarde2733d22004-06-21 22:46:10 +0000866#define ADB_MAX_OUT_LEN 16
867
bellard63066f42004-06-03 18:45:02 +0000868typedef struct ADBDevice ADBDevice;
869
bellarde2733d22004-06-21 22:46:10 +0000870/* buf = NULL means polling */
871typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
872 const uint8_t *buf, int len);
bellard12c28fe2004-07-12 20:26:20 +0000873typedef int ADBDeviceReset(ADBDevice *d);
874
bellard63066f42004-06-03 18:45:02 +0000875struct ADBDevice {
876 struct ADBBusState *bus;
877 int devaddr;
878 int handler;
bellarde2733d22004-06-21 22:46:10 +0000879 ADBDeviceRequest *devreq;
bellard12c28fe2004-07-12 20:26:20 +0000880 ADBDeviceReset *devreset;
bellard63066f42004-06-03 18:45:02 +0000881 void *opaque;
882};
883
884typedef struct ADBBusState {
885 ADBDevice devices[MAX_ADB_DEVICES];
886 int nb_devices;
bellarde2733d22004-06-21 22:46:10 +0000887 int poll_index;
bellard63066f42004-06-03 18:45:02 +0000888} ADBBusState;
889
bellarde2733d22004-06-21 22:46:10 +0000890int adb_request(ADBBusState *s, uint8_t *buf_out,
891 const uint8_t *buf, int len);
892int adb_poll(ADBBusState *s, uint8_t *buf_out);
bellard63066f42004-06-03 18:45:02 +0000893
894ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
bellarde2733d22004-06-21 22:46:10 +0000895 ADBDeviceRequest *devreq,
bellard12c28fe2004-07-12 20:26:20 +0000896 ADBDeviceReset *devreset,
bellard63066f42004-06-03 18:45:02 +0000897 void *opaque);
898void adb_kbd_init(ADBBusState *bus);
899void adb_mouse_init(ADBBusState *bus);
900
901/* cuda.c */
902
903extern ADBBusState adb_bus;
bellard54fa5af2005-06-05 14:50:39 +0000904int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
bellard63066f42004-06-03 18:45:02 +0000905
bellardbb36d472005-11-05 14:22:28 +0000906#include "hw/usb.h"
907
bellarda594cfb2005-11-06 16:13:29 +0000908/* usb ports of the VM */
909
910#define MAX_VM_USB_PORTS 8
911
912extern USBPort *vm_usb_ports[MAX_VM_USB_PORTS];
913extern USBDevice *vm_usb_hub;
914
915void do_usb_add(const char *devname);
916void do_usb_del(const char *devname);
917void usb_info(void);
918
bellardea2384d2004-08-01 21:59:26 +0000919#endif /* defined(QEMU_TOOL) */
920
bellardc4b1fcc2004-03-14 21:44:30 +0000921/* monitor.c */
bellard82c643f2004-07-14 17:28:13 +0000922void monitor_init(CharDriverState *hd, int show_banner);
bellardea2384d2004-08-01 21:59:26 +0000923void term_puts(const char *str);
924void term_vprintf(const char *fmt, va_list ap);
bellard40c3bac2004-04-04 12:56:28 +0000925void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
bellardc4b1fcc2004-03-14 21:44:30 +0000926void term_flush(void);
927void term_print_help(void);
bellardea2384d2004-08-01 21:59:26 +0000928void monitor_readline(const char *prompt, int is_password,
929 char *buf, int buf_size);
930
931/* readline.c */
932typedef void ReadLineFunc(void *opaque, const char *str);
933
934extern int completion_index;
935void add_completion(const char *str);
936void readline_handle_byte(int ch);
937void readline_find_completion(const char *cmdline);
938const char *readline_get_history(unsigned int index);
939void readline_start(const char *prompt, int is_password,
940 ReadLineFunc *readline_func, void *opaque);
bellardc4b1fcc2004-03-14 21:44:30 +0000941
bellard5e6ad6f2005-08-21 09:30:40 +0000942void kqemu_record_dump(void);
943
bellardfc01f7e2003-06-30 10:03:06 +0000944#endif /* VL_H */