bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Tiny Code Generator for QEMU |
| 3 | * |
| 4 | * Copyright (c) 2008 Fabrice Bellard |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | */ |
| 24 | #include "tcg.h" |
| 25 | |
blueswir1 | cf2be98 | 2008-03-21 18:03:09 +0000 | [diff] [blame] | 26 | #ifndef CONFIG_NO_DYNGEN_OP |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 27 | /* legacy dyngen operations */ |
| 28 | #include "gen-op.h" |
blueswir1 | cf2be98 | 2008-03-21 18:03:09 +0000 | [diff] [blame] | 29 | #endif |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 30 | |
| 31 | int gen_new_label(void); |
| 32 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 33 | static inline void tcg_gen_op1(int opc, TCGv arg1) |
| 34 | { |
| 35 | *gen_opc_ptr++ = opc; |
| 36 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 37 | } |
| 38 | |
| 39 | static inline void tcg_gen_op1i(int opc, TCGArg arg1) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 40 | { |
| 41 | *gen_opc_ptr++ = opc; |
| 42 | *gen_opparam_ptr++ = arg1; |
| 43 | } |
| 44 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 45 | static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 46 | { |
| 47 | *gen_opc_ptr++ = opc; |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 48 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 49 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 50 | } |
| 51 | |
| 52 | static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) |
| 53 | { |
| 54 | *gen_opc_ptr++ = opc; |
| 55 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 56 | *gen_opparam_ptr++ = arg2; |
| 57 | } |
| 58 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 59 | static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 60 | { |
| 61 | *gen_opc_ptr++ = opc; |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 62 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 63 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 64 | *gen_opparam_ptr++ = GET_TCGV(arg3); |
| 65 | } |
| 66 | |
| 67 | static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3) |
| 68 | { |
| 69 | *gen_opc_ptr++ = opc; |
| 70 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 71 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 72 | *gen_opparam_ptr++ = arg3; |
| 73 | } |
| 74 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 75 | static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
| 76 | TCGv arg4) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 77 | { |
| 78 | *gen_opc_ptr++ = opc; |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 79 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 80 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 81 | *gen_opparam_ptr++ = GET_TCGV(arg3); |
| 82 | *gen_opparam_ptr++ = GET_TCGV(arg4); |
| 83 | } |
| 84 | |
| 85 | static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
| 86 | TCGArg arg4) |
| 87 | { |
| 88 | *gen_opc_ptr++ = opc; |
| 89 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 90 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 91 | *gen_opparam_ptr++ = GET_TCGV(arg3); |
| 92 | *gen_opparam_ptr++ = arg4; |
| 93 | } |
| 94 | |
| 95 | static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, |
| 96 | TCGArg arg4) |
| 97 | { |
| 98 | *gen_opc_ptr++ = opc; |
| 99 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 100 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 101 | *gen_opparam_ptr++ = arg3; |
| 102 | *gen_opparam_ptr++ = arg4; |
| 103 | } |
| 104 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 105 | static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, |
| 106 | TCGv arg3, TCGv arg4, |
| 107 | TCGv arg5) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 108 | { |
| 109 | *gen_opc_ptr++ = opc; |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 110 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 111 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 112 | *gen_opparam_ptr++ = GET_TCGV(arg3); |
| 113 | *gen_opparam_ptr++ = GET_TCGV(arg4); |
| 114 | *gen_opparam_ptr++ = GET_TCGV(arg5); |
| 115 | } |
| 116 | |
| 117 | static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, |
| 118 | TCGv arg3, TCGv arg4, |
| 119 | TCGArg arg5) |
| 120 | { |
| 121 | *gen_opc_ptr++ = opc; |
| 122 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 123 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 124 | *gen_opparam_ptr++ = GET_TCGV(arg3); |
| 125 | *gen_opparam_ptr++ = GET_TCGV(arg4); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 126 | *gen_opparam_ptr++ = arg5; |
| 127 | } |
| 128 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 129 | static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, |
| 130 | TCGv arg3, TCGv arg4, |
| 131 | TCGv arg5, TCGv arg6) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 132 | { |
| 133 | *gen_opc_ptr++ = opc; |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 134 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 135 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 136 | *gen_opparam_ptr++ = GET_TCGV(arg3); |
| 137 | *gen_opparam_ptr++ = GET_TCGV(arg4); |
| 138 | *gen_opparam_ptr++ = GET_TCGV(arg5); |
| 139 | *gen_opparam_ptr++ = GET_TCGV(arg6); |
| 140 | } |
| 141 | |
| 142 | static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, |
| 143 | TCGv arg3, TCGv arg4, |
| 144 | TCGArg arg5, TCGArg arg6) |
| 145 | { |
| 146 | *gen_opc_ptr++ = opc; |
| 147 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 148 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 149 | *gen_opparam_ptr++ = GET_TCGV(arg3); |
| 150 | *gen_opparam_ptr++ = GET_TCGV(arg4); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 151 | *gen_opparam_ptr++ = arg5; |
| 152 | *gen_opparam_ptr++ = arg6; |
| 153 | } |
| 154 | |
| 155 | static inline void gen_set_label(int n) |
| 156 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 157 | tcg_gen_op1i(INDEX_op_set_label, n); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 158 | } |
| 159 | |
blueswir1 | fb50d41 | 2008-03-21 17:58:45 +0000 | [diff] [blame] | 160 | static inline void tcg_gen_br(int label) |
| 161 | { |
| 162 | tcg_gen_op1i(INDEX_op_br, label); |
| 163 | } |
| 164 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 165 | static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 166 | { |
| 167 | tcg_gen_op2(INDEX_op_mov_i32, ret, arg); |
| 168 | } |
| 169 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 170 | static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 171 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 172 | tcg_gen_op2i(INDEX_op_movi_i32, ret, arg); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 173 | } |
| 174 | |
| 175 | /* helper calls */ |
| 176 | #define TCG_HELPER_CALL_FLAGS 0 |
| 177 | |
| 178 | static inline void tcg_gen_helper_0_0(void *func) |
| 179 | { |
| 180 | tcg_gen_call(&tcg_ctx, |
| 181 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
| 182 | 0, NULL, 0, NULL); |
| 183 | } |
| 184 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 185 | static inline void tcg_gen_helper_0_1(void *func, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 186 | { |
| 187 | tcg_gen_call(&tcg_ctx, |
| 188 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
| 189 | 0, NULL, 1, &arg); |
| 190 | } |
| 191 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 192 | static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 193 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 194 | TCGv args[2]; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 195 | args[0] = arg1; |
| 196 | args[1] = arg2; |
| 197 | tcg_gen_call(&tcg_ctx, |
| 198 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
| 199 | 0, NULL, 2, args); |
| 200 | } |
| 201 | |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 202 | static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2, |
| 203 | TCGv arg3, TCGv arg4) |
| 204 | { |
| 205 | TCGv args[4]; |
| 206 | args[0] = arg1; |
| 207 | args[1] = arg2; |
| 208 | args[2] = arg3; |
| 209 | args[3] = arg4; |
| 210 | tcg_gen_call(&tcg_ctx, |
| 211 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
| 212 | 0, NULL, 4, args); |
| 213 | } |
| 214 | |
| 215 | static inline void tcg_gen_helper_1_0(void *func, TCGv ret) |
| 216 | { |
| 217 | tcg_gen_call(&tcg_ctx, |
| 218 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
| 219 | 1, &ret, 0, NULL); |
| 220 | } |
| 221 | |
| 222 | static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1) |
| 223 | { |
| 224 | tcg_gen_call(&tcg_ctx, |
| 225 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
| 226 | 1, &ret, 1, &arg1); |
| 227 | } |
| 228 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 229 | static inline void tcg_gen_helper_1_2(void *func, TCGv ret, |
| 230 | TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 231 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 232 | TCGv args[2]; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 233 | args[0] = arg1; |
| 234 | args[1] = arg2; |
| 235 | tcg_gen_call(&tcg_ctx, |
| 236 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
| 237 | 1, &ret, 2, args); |
| 238 | } |
| 239 | |
pbrook | 6ddbc6e | 2008-03-31 03:46:33 +0000 | [diff] [blame^] | 240 | static inline void tcg_gen_helper_1_3(void *func, TCGv ret, |
| 241 | TCGv arg1, TCGv arg2, TCGv arg3) |
| 242 | { |
| 243 | TCGv args[3]; |
| 244 | args[0] = arg1; |
| 245 | args[1] = arg2; |
| 246 | args[2] = arg3; |
| 247 | tcg_gen_call(&tcg_ctx, |
| 248 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
| 249 | 1, &ret, 3, args); |
| 250 | } |
| 251 | |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 252 | static inline void tcg_gen_helper_1_4(void *func, TCGv ret, |
| 253 | TCGv arg1, TCGv arg2, TCGv arg3, |
| 254 | TCGv arg4) |
| 255 | { |
| 256 | TCGv args[4]; |
| 257 | args[0] = arg1; |
| 258 | args[1] = arg2; |
| 259 | args[2] = arg3; |
| 260 | args[3] = arg4; |
| 261 | tcg_gen_call(&tcg_ctx, |
| 262 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
| 263 | 1, &ret, 4, args); |
| 264 | } |
| 265 | |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 266 | /* 32 bit ops */ |
| 267 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 268 | static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 269 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 270 | tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 271 | } |
| 272 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 273 | static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 274 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 275 | tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 276 | } |
| 277 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 278 | static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 279 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 280 | tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 281 | } |
| 282 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 283 | static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 284 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 285 | tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 286 | } |
| 287 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 288 | static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 289 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 290 | tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 291 | } |
| 292 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 293 | static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 294 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 295 | tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 296 | } |
| 297 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 298 | static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 299 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 300 | tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 301 | } |
| 302 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 303 | static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 304 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 305 | tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 306 | } |
| 307 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 308 | static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 309 | { |
| 310 | tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2); |
| 311 | } |
| 312 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 313 | static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 314 | { |
blueswir1 | 7089442 | 2008-02-20 18:01:23 +0000 | [diff] [blame] | 315 | /* some cases can be optimized here */ |
| 316 | if (arg2 == 0) { |
| 317 | tcg_gen_mov_i32(ret, arg1); |
| 318 | } else { |
| 319 | tcg_gen_add_i32(ret, arg1, tcg_const_i32(arg2)); |
| 320 | } |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 321 | } |
| 322 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 323 | static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 324 | { |
| 325 | tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); |
| 326 | } |
| 327 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 328 | static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 329 | { |
blueswir1 | 7089442 | 2008-02-20 18:01:23 +0000 | [diff] [blame] | 330 | /* some cases can be optimized here */ |
| 331 | if (arg2 == 0) { |
| 332 | tcg_gen_mov_i32(ret, arg1); |
| 333 | } else { |
| 334 | tcg_gen_sub_i32(ret, arg1, tcg_const_i32(arg2)); |
| 335 | } |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 336 | } |
| 337 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 338 | static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 339 | { |
| 340 | tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2); |
| 341 | } |
| 342 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 343 | static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 344 | { |
| 345 | /* some cases can be optimized here */ |
| 346 | if (arg2 == 0) { |
| 347 | tcg_gen_movi_i32(ret, 0); |
| 348 | } else if (arg2 == 0xffffffff) { |
| 349 | tcg_gen_mov_i32(ret, arg1); |
| 350 | } else { |
| 351 | tcg_gen_and_i32(ret, arg1, tcg_const_i32(arg2)); |
| 352 | } |
| 353 | } |
| 354 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 355 | static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 356 | { |
| 357 | tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2); |
| 358 | } |
| 359 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 360 | static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 361 | { |
| 362 | /* some cases can be optimized here */ |
| 363 | if (arg2 == 0xffffffff) { |
blueswir1 | 7089442 | 2008-02-20 18:01:23 +0000 | [diff] [blame] | 364 | tcg_gen_movi_i32(ret, 0xffffffff); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 365 | } else if (arg2 == 0) { |
| 366 | tcg_gen_mov_i32(ret, arg1); |
| 367 | } else { |
| 368 | tcg_gen_or_i32(ret, arg1, tcg_const_i32(arg2)); |
| 369 | } |
| 370 | } |
| 371 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 372 | static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 373 | { |
| 374 | tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2); |
| 375 | } |
| 376 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 377 | static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 378 | { |
| 379 | /* some cases can be optimized here */ |
| 380 | if (arg2 == 0) { |
| 381 | tcg_gen_mov_i32(ret, arg1); |
| 382 | } else { |
| 383 | tcg_gen_xor_i32(ret, arg1, tcg_const_i32(arg2)); |
| 384 | } |
| 385 | } |
| 386 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 387 | static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 388 | { |
| 389 | tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2); |
| 390 | } |
| 391 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 392 | static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 393 | { |
| 394 | tcg_gen_shl_i32(ret, arg1, tcg_const_i32(arg2)); |
| 395 | } |
| 396 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 397 | static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 398 | { |
| 399 | tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2); |
| 400 | } |
| 401 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 402 | static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 403 | { |
| 404 | tcg_gen_shr_i32(ret, arg1, tcg_const_i32(arg2)); |
| 405 | } |
| 406 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 407 | static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 408 | { |
| 409 | tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2); |
| 410 | } |
| 411 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 412 | static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 413 | { |
| 414 | tcg_gen_sar_i32(ret, arg1, tcg_const_i32(arg2)); |
| 415 | } |
| 416 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 417 | static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 418 | int label_index) |
| 419 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 420 | tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 421 | } |
| 422 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 423 | static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 424 | { |
| 425 | tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2); |
| 426 | } |
| 427 | |
| 428 | #ifdef TCG_TARGET_HAS_div_i32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 429 | static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 430 | { |
| 431 | tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2); |
| 432 | } |
| 433 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 434 | static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 435 | { |
| 436 | tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2); |
| 437 | } |
| 438 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 439 | static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 440 | { |
| 441 | tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2); |
| 442 | } |
| 443 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 444 | static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 445 | { |
| 446 | tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2); |
| 447 | } |
| 448 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 449 | static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 450 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 451 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 452 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 453 | tcg_gen_sari_i32(t0, arg1, 31); |
| 454 | tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); |
| 455 | } |
| 456 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 457 | static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 458 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 459 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 460 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 461 | tcg_gen_sari_i32(t0, arg1, 31); |
| 462 | tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); |
| 463 | } |
| 464 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 465 | static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 466 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 467 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 468 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 469 | tcg_gen_movi_i32(t0, 0); |
| 470 | tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); |
| 471 | } |
| 472 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 473 | static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 474 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 475 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 476 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 477 | tcg_gen_movi_i32(t0, 0); |
| 478 | tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); |
| 479 | } |
| 480 | #endif |
| 481 | |
| 482 | #if TCG_TARGET_REG_BITS == 32 |
| 483 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 484 | static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 485 | { |
| 486 | tcg_gen_mov_i32(ret, arg); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 487 | tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 488 | } |
| 489 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 490 | static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 491 | { |
| 492 | tcg_gen_movi_i32(ret, arg); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 493 | tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 494 | } |
| 495 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 496 | static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 497 | { |
| 498 | tcg_gen_ld8u_i32(ret, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 499 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 500 | } |
| 501 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 502 | static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 503 | { |
| 504 | tcg_gen_ld8s_i32(ret, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 505 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 506 | } |
| 507 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 508 | static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 509 | { |
| 510 | tcg_gen_ld16u_i32(ret, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 511 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 512 | } |
| 513 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 514 | static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 515 | { |
| 516 | tcg_gen_ld16s_i32(ret, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 517 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 518 | } |
| 519 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 520 | static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 521 | { |
| 522 | tcg_gen_ld_i32(ret, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 523 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 524 | } |
| 525 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 526 | static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 527 | { |
| 528 | tcg_gen_ld_i32(ret, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 529 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 530 | } |
| 531 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 532 | static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 533 | { |
| 534 | /* since arg2 and ret have different types, they cannot be the |
| 535 | same temporary */ |
| 536 | #ifdef TCG_TARGET_WORDS_BIGENDIAN |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 537 | tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 538 | tcg_gen_ld_i32(ret, arg2, offset + 4); |
| 539 | #else |
| 540 | tcg_gen_ld_i32(ret, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 541 | tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 542 | #endif |
| 543 | } |
| 544 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 545 | static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 546 | { |
| 547 | tcg_gen_st8_i32(arg1, arg2, offset); |
| 548 | } |
| 549 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 550 | static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 551 | { |
| 552 | tcg_gen_st16_i32(arg1, arg2, offset); |
| 553 | } |
| 554 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 555 | static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 556 | { |
| 557 | tcg_gen_st_i32(arg1, arg2, offset); |
| 558 | } |
| 559 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 560 | static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 561 | { |
| 562 | #ifdef TCG_TARGET_WORDS_BIGENDIAN |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 563 | tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 564 | tcg_gen_st_i32(arg1, arg2, offset + 4); |
| 565 | #else |
| 566 | tcg_gen_st_i32(arg1, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 567 | tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 568 | #endif |
| 569 | } |
| 570 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 571 | static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 572 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 573 | tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), |
| 574 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 575 | } |
| 576 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 577 | static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 578 | { |
| 579 | tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); |
| 580 | } |
| 581 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 582 | static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 583 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 584 | tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), |
| 585 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 586 | } |
| 587 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 588 | static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 589 | { |
| 590 | tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); |
| 591 | } |
| 592 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 593 | static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 594 | { |
| 595 | tcg_gen_and_i32(ret, arg1, arg2); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 596 | tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 597 | } |
| 598 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 599 | static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 600 | { |
| 601 | tcg_gen_andi_i32(ret, arg1, arg2); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 602 | tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 603 | } |
| 604 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 605 | static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 606 | { |
| 607 | tcg_gen_or_i32(ret, arg1, arg2); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 608 | tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 609 | } |
| 610 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 611 | static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 612 | { |
| 613 | tcg_gen_ori_i32(ret, arg1, arg2); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 614 | tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 615 | } |
| 616 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 617 | static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 618 | { |
| 619 | tcg_gen_xor_i32(ret, arg1, arg2); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 620 | tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 621 | } |
| 622 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 623 | static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 624 | { |
| 625 | tcg_gen_xori_i32(ret, arg1, arg2); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 626 | tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 627 | } |
| 628 | |
| 629 | /* XXX: use generic code when basic block handling is OK or CPU |
| 630 | specific code (x86) */ |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 631 | static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 632 | { |
| 633 | tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2); |
| 634 | } |
| 635 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 636 | static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 637 | { |
| 638 | tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); |
| 639 | } |
| 640 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 641 | static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 642 | { |
| 643 | tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2); |
| 644 | } |
| 645 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 646 | static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 647 | { |
| 648 | tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); |
| 649 | } |
| 650 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 651 | static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 652 | { |
| 653 | tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2); |
| 654 | } |
| 655 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 656 | static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 657 | { |
| 658 | tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); |
| 659 | } |
| 660 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 661 | static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 662 | int label_index) |
| 663 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 664 | tcg_gen_op6ii(INDEX_op_brcond2_i32, |
| 665 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), |
| 666 | cond, label_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 667 | } |
| 668 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 669 | static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 670 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 671 | TCGv t0, t1; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 672 | |
| 673 | t0 = tcg_temp_new(TCG_TYPE_I64); |
| 674 | t1 = tcg_temp_new(TCG_TYPE_I32); |
| 675 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 676 | tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 677 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 678 | tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); |
| 679 | tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
| 680 | tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2); |
| 681 | tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 682 | |
| 683 | tcg_gen_mov_i64(ret, t0); |
| 684 | } |
| 685 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 686 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 687 | { |
| 688 | tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); |
| 689 | } |
| 690 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 691 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 692 | { |
| 693 | tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); |
| 694 | } |
| 695 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 696 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 697 | { |
| 698 | tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); |
| 699 | } |
| 700 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 701 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 702 | { |
| 703 | tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); |
| 704 | } |
| 705 | |
| 706 | #else |
| 707 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 708 | static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 709 | { |
| 710 | tcg_gen_op2(INDEX_op_mov_i64, ret, arg); |
| 711 | } |
| 712 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 713 | static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 714 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 715 | tcg_gen_op2i(INDEX_op_movi_i64, ret, arg); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 716 | } |
| 717 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 718 | static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, |
| 719 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 720 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 721 | tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 722 | } |
| 723 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 724 | static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, |
| 725 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 726 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 727 | tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 728 | } |
| 729 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 730 | static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, |
| 731 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 732 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 733 | tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 734 | } |
| 735 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 736 | static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, |
| 737 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 738 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 739 | tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 740 | } |
| 741 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 742 | static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, |
| 743 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 744 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 745 | tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 746 | } |
| 747 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 748 | static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, |
| 749 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 750 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 751 | tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 752 | } |
| 753 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 754 | static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 755 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 756 | tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 757 | } |
| 758 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 759 | static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, |
| 760 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 761 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 762 | tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 763 | } |
| 764 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 765 | static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, |
| 766 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 767 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 768 | tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 769 | } |
| 770 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 771 | static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, |
| 772 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 773 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 774 | tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 775 | } |
| 776 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 777 | static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 778 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 779 | tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 780 | } |
| 781 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 782 | static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 783 | { |
| 784 | tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); |
| 785 | } |
| 786 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 787 | static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 788 | { |
| 789 | tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); |
| 790 | } |
| 791 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 792 | static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 793 | { |
| 794 | tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); |
| 795 | } |
| 796 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 797 | static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 798 | { |
| 799 | tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); |
| 800 | } |
| 801 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 802 | static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 803 | { |
| 804 | tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); |
| 805 | } |
| 806 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 807 | static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 808 | { |
| 809 | tcg_gen_and_i64(ret, arg1, tcg_const_i64(arg2)); |
| 810 | } |
| 811 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 812 | static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 813 | { |
| 814 | tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2); |
| 815 | } |
| 816 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 817 | static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 818 | { |
| 819 | tcg_gen_or_i64(ret, arg1, tcg_const_i64(arg2)); |
| 820 | } |
| 821 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 822 | static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 823 | { |
| 824 | tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2); |
| 825 | } |
| 826 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 827 | static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 828 | { |
| 829 | tcg_gen_xor_i64(ret, arg1, tcg_const_i64(arg2)); |
| 830 | } |
| 831 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 832 | static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 833 | { |
| 834 | tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2); |
| 835 | } |
| 836 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 837 | static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 838 | { |
| 839 | tcg_gen_shl_i64(ret, arg1, tcg_const_i64(arg2)); |
| 840 | } |
| 841 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 842 | static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 843 | { |
| 844 | tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2); |
| 845 | } |
| 846 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 847 | static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 848 | { |
| 849 | tcg_gen_shr_i64(ret, arg1, tcg_const_i64(arg2)); |
| 850 | } |
| 851 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 852 | static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 853 | { |
| 854 | tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2); |
| 855 | } |
| 856 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 857 | static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 858 | { |
| 859 | tcg_gen_sar_i64(ret, arg1, tcg_const_i64(arg2)); |
| 860 | } |
| 861 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 862 | static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 863 | int label_index) |
| 864 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 865 | tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 866 | } |
| 867 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 868 | static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 869 | { |
| 870 | tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); |
| 871 | } |
| 872 | |
| 873 | #ifdef TCG_TARGET_HAS_div_i64 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 874 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 875 | { |
| 876 | tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); |
| 877 | } |
| 878 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 879 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 880 | { |
| 881 | tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); |
| 882 | } |
| 883 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 884 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 885 | { |
| 886 | tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); |
| 887 | } |
| 888 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 889 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 890 | { |
| 891 | tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); |
| 892 | } |
| 893 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 894 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 895 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 896 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 897 | t0 = tcg_temp_new(TCG_TYPE_I64); |
| 898 | tcg_gen_sari_i64(t0, arg1, 63); |
| 899 | tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); |
| 900 | } |
| 901 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 902 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 903 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 904 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 905 | t0 = tcg_temp_new(TCG_TYPE_I64); |
| 906 | tcg_gen_sari_i64(t0, arg1, 63); |
| 907 | tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); |
| 908 | } |
| 909 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 910 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 911 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 912 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 913 | t0 = tcg_temp_new(TCG_TYPE_I64); |
| 914 | tcg_gen_movi_i64(t0, 0); |
| 915 | tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); |
| 916 | } |
| 917 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 918 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 919 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 920 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 921 | t0 = tcg_temp_new(TCG_TYPE_I64); |
| 922 | tcg_gen_movi_i64(t0, 0); |
| 923 | tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); |
| 924 | } |
| 925 | #endif |
| 926 | |
| 927 | #endif |
| 928 | |
| 929 | /***************************************/ |
| 930 | /* optional operations */ |
| 931 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 932 | static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 933 | { |
| 934 | #ifdef TCG_TARGET_HAS_ext8s_i32 |
| 935 | tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg); |
| 936 | #else |
| 937 | tcg_gen_shli_i32(ret, arg, 24); |
bellard | 5ff9d6a | 2008-02-04 00:37:54 +0000 | [diff] [blame] | 938 | tcg_gen_sari_i32(ret, ret, 24); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 939 | #endif |
| 940 | } |
| 941 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 942 | static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 943 | { |
| 944 | #ifdef TCG_TARGET_HAS_ext16s_i32 |
| 945 | tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg); |
| 946 | #else |
| 947 | tcg_gen_shli_i32(ret, arg, 16); |
bellard | 5ff9d6a | 2008-02-04 00:37:54 +0000 | [diff] [blame] | 948 | tcg_gen_sari_i32(ret, ret, 16); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 949 | #endif |
| 950 | } |
| 951 | |
| 952 | /* Note: we assume the two high bytes are set to zero */ |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 953 | static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 954 | { |
| 955 | #ifdef TCG_TARGET_HAS_bswap16_i32 |
| 956 | tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg); |
| 957 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 958 | TCGv t0, t1; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 959 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 960 | t1 = tcg_temp_new(TCG_TYPE_I32); |
| 961 | |
| 962 | tcg_gen_shri_i32(t0, arg, 8); |
| 963 | tcg_gen_andi_i32(t1, arg, 0x000000ff); |
| 964 | tcg_gen_shli_i32(t1, t1, 8); |
| 965 | tcg_gen_or_i32(ret, t0, t1); |
| 966 | #endif |
| 967 | } |
| 968 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 969 | static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 970 | { |
| 971 | #ifdef TCG_TARGET_HAS_bswap_i32 |
| 972 | tcg_gen_op2(INDEX_op_bswap_i32, ret, arg); |
| 973 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 974 | TCGv t0, t1; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 975 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 976 | t1 = tcg_temp_new(TCG_TYPE_I32); |
| 977 | |
| 978 | tcg_gen_shli_i32(t0, arg, 24); |
| 979 | |
| 980 | tcg_gen_andi_i32(t1, arg, 0x0000ff00); |
| 981 | tcg_gen_shli_i32(t1, t1, 8); |
| 982 | tcg_gen_or_i32(t0, t0, t1); |
| 983 | |
| 984 | tcg_gen_shri_i32(t1, arg, 8); |
| 985 | tcg_gen_andi_i32(t1, t1, 0x0000ff00); |
| 986 | tcg_gen_or_i32(t0, t0, t1); |
| 987 | |
| 988 | tcg_gen_shri_i32(t1, arg, 24); |
| 989 | tcg_gen_or_i32(ret, t0, t1); |
| 990 | #endif |
| 991 | } |
| 992 | |
| 993 | #if TCG_TARGET_REG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 994 | static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 995 | { |
| 996 | tcg_gen_ext8s_i32(ret, arg); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 997 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 998 | } |
| 999 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1000 | static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1001 | { |
| 1002 | tcg_gen_ext16s_i32(ret, arg); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1003 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1004 | } |
| 1005 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1006 | static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1007 | { |
| 1008 | tcg_gen_mov_i32(ret, arg); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1009 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1010 | } |
| 1011 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1012 | static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1013 | { |
| 1014 | tcg_gen_mov_i32(ret, arg); |
| 1015 | } |
| 1016 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1017 | static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1018 | { |
| 1019 | tcg_gen_mov_i32(ret, arg); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1020 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1021 | } |
| 1022 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1023 | static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1024 | { |
| 1025 | tcg_gen_mov_i32(ret, arg); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1026 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1027 | } |
| 1028 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1029 | static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1030 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1031 | TCGv t0, t1; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1032 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 1033 | t1 = tcg_temp_new(TCG_TYPE_I32); |
| 1034 | |
| 1035 | tcg_gen_bswap_i32(t0, arg); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1036 | tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1037 | tcg_gen_mov_i32(ret, t1); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1038 | tcg_gen_mov_i32(TCGV_HIGH(ret), t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1039 | } |
| 1040 | #else |
| 1041 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1042 | static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1043 | { |
| 1044 | #ifdef TCG_TARGET_HAS_ext8s_i64 |
| 1045 | tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg); |
| 1046 | #else |
| 1047 | tcg_gen_shli_i64(ret, arg, 56); |
bellard | 5ff9d6a | 2008-02-04 00:37:54 +0000 | [diff] [blame] | 1048 | tcg_gen_sari_i64(ret, ret, 56); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1049 | #endif |
| 1050 | } |
| 1051 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1052 | static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1053 | { |
| 1054 | #ifdef TCG_TARGET_HAS_ext16s_i64 |
| 1055 | tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg); |
| 1056 | #else |
| 1057 | tcg_gen_shli_i64(ret, arg, 48); |
bellard | 5ff9d6a | 2008-02-04 00:37:54 +0000 | [diff] [blame] | 1058 | tcg_gen_sari_i64(ret, ret, 48); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1059 | #endif |
| 1060 | } |
| 1061 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1062 | static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1063 | { |
| 1064 | #ifdef TCG_TARGET_HAS_ext32s_i64 |
| 1065 | tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg); |
| 1066 | #else |
| 1067 | tcg_gen_shli_i64(ret, arg, 32); |
bellard | 5ff9d6a | 2008-02-04 00:37:54 +0000 | [diff] [blame] | 1068 | tcg_gen_sari_i64(ret, ret, 32); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1069 | #endif |
| 1070 | } |
| 1071 | |
| 1072 | /* Note: we assume the target supports move between 32 and 64 bit |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1073 | registers. This will probably break MIPS64 targets. */ |
| 1074 | static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1075 | { |
| 1076 | tcg_gen_mov_i32(ret, arg); |
| 1077 | } |
| 1078 | |
| 1079 | /* Note: we assume the target supports move between 32 and 64 bit |
| 1080 | registers */ |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1081 | static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1082 | { |
| 1083 | tcg_gen_andi_i64(ret, arg, 0xffffffff); |
| 1084 | } |
| 1085 | |
| 1086 | /* Note: we assume the target supports move between 32 and 64 bit |
| 1087 | registers */ |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1088 | static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1089 | { |
| 1090 | tcg_gen_ext32s_i64(ret, arg); |
| 1091 | } |
| 1092 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1093 | static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1094 | { |
| 1095 | #ifdef TCG_TARGET_HAS_bswap_i64 |
| 1096 | tcg_gen_op2(INDEX_op_bswap_i64, ret, arg); |
| 1097 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1098 | TCGv t0, t1; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1099 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 1100 | t1 = tcg_temp_new(TCG_TYPE_I32); |
| 1101 | |
| 1102 | tcg_gen_shli_i64(t0, arg, 56); |
| 1103 | |
| 1104 | tcg_gen_andi_i64(t1, arg, 0x0000ff00); |
| 1105 | tcg_gen_shli_i64(t1, t1, 40); |
| 1106 | tcg_gen_or_i64(t0, t0, t1); |
| 1107 | |
| 1108 | tcg_gen_andi_i64(t1, arg, 0x00ff0000); |
| 1109 | tcg_gen_shli_i64(t1, t1, 24); |
| 1110 | tcg_gen_or_i64(t0, t0, t1); |
| 1111 | |
| 1112 | tcg_gen_andi_i64(t1, arg, 0xff000000); |
| 1113 | tcg_gen_shli_i64(t1, t1, 8); |
| 1114 | tcg_gen_or_i64(t0, t0, t1); |
| 1115 | |
| 1116 | tcg_gen_shri_i64(t1, arg, 8); |
| 1117 | tcg_gen_andi_i64(t1, t1, 0xff000000); |
| 1118 | tcg_gen_or_i64(t0, t0, t1); |
| 1119 | |
| 1120 | tcg_gen_shri_i64(t1, arg, 24); |
| 1121 | tcg_gen_andi_i64(t1, t1, 0x00ff0000); |
| 1122 | tcg_gen_or_i64(t0, t0, t1); |
| 1123 | |
| 1124 | tcg_gen_shri_i64(t1, arg, 40); |
| 1125 | tcg_gen_andi_i64(t1, t1, 0x0000ff00); |
| 1126 | tcg_gen_or_i64(t0, t0, t1); |
| 1127 | |
| 1128 | tcg_gen_shri_i64(t1, arg, 56); |
| 1129 | tcg_gen_or_i64(ret, t0, t1); |
| 1130 | #endif |
| 1131 | } |
| 1132 | |
| 1133 | #endif |
| 1134 | |
bellard | 5ff9d6a | 2008-02-04 00:37:54 +0000 | [diff] [blame] | 1135 | |
| 1136 | static inline void tcg_gen_discard_i32(TCGv arg) |
| 1137 | { |
| 1138 | tcg_gen_op1(INDEX_op_discard, arg); |
| 1139 | } |
| 1140 | |
| 1141 | #if TCG_TARGET_REG_BITS == 32 |
| 1142 | static inline void tcg_gen_discard_i64(TCGv arg) |
| 1143 | { |
| 1144 | tcg_gen_discard_i32(arg); |
| 1145 | tcg_gen_discard_i32(TCGV_HIGH(arg)); |
| 1146 | } |
| 1147 | #else |
| 1148 | static inline void tcg_gen_discard_i64(TCGv arg) |
| 1149 | { |
| 1150 | tcg_gen_op1(INDEX_op_discard, arg); |
| 1151 | } |
| 1152 | #endif |
| 1153 | |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1154 | /***************************************/ |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1155 | static inline void tcg_gen_macro_2(TCGv ret0, TCGv ret1, int macro_id) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1156 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1157 | tcg_gen_op3i(INDEX_op_macro_2, ret0, ret1, macro_id); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1158 | } |
| 1159 | |
| 1160 | /***************************************/ |
| 1161 | /* QEMU specific operations. Their type depend on the QEMU CPU |
| 1162 | type. */ |
| 1163 | #ifndef TARGET_LONG_BITS |
| 1164 | #error must include QEMU headers |
| 1165 | #endif |
| 1166 | |
| 1167 | static inline void tcg_gen_exit_tb(tcg_target_long val) |
| 1168 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1169 | tcg_gen_op1i(INDEX_op_exit_tb, val); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1170 | } |
| 1171 | |
| 1172 | static inline void tcg_gen_goto_tb(int idx) |
| 1173 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1174 | tcg_gen_op1i(INDEX_op_goto_tb, idx); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1175 | } |
| 1176 | |
| 1177 | #if TCG_TARGET_REG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1178 | static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1179 | { |
| 1180 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1181 | tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1182 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1183 | tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index); |
| 1184 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1185 | #endif |
| 1186 | } |
| 1187 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1188 | static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1189 | { |
| 1190 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1191 | tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1192 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1193 | tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index); |
pbrook | 21fc3cf | 2008-03-04 23:52:47 +0000 | [diff] [blame] | 1194 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1195 | #endif |
| 1196 | } |
| 1197 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1198 | static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1199 | { |
| 1200 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1201 | tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1202 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1203 | tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index); |
| 1204 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1205 | #endif |
| 1206 | } |
| 1207 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1208 | static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1209 | { |
| 1210 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1211 | tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1212 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1213 | tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index); |
pbrook | 21fc3cf | 2008-03-04 23:52:47 +0000 | [diff] [blame] | 1214 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1215 | #endif |
| 1216 | } |
| 1217 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1218 | static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1219 | { |
| 1220 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1221 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1222 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1223 | tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
| 1224 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1225 | #endif |
| 1226 | } |
| 1227 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1228 | static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1229 | { |
| 1230 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1231 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1232 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1233 | tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
| 1234 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1235 | #endif |
| 1236 | } |
| 1237 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1238 | static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1239 | { |
| 1240 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1241 | tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1242 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1243 | tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), |
| 1244 | addr, TCGV_HIGH(addr), mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1245 | #endif |
| 1246 | } |
| 1247 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1248 | static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1249 | { |
| 1250 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1251 | tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1252 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1253 | tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1254 | #endif |
| 1255 | } |
| 1256 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1257 | static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1258 | { |
| 1259 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1260 | tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1261 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1262 | tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1263 | #endif |
| 1264 | } |
| 1265 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1266 | static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1267 | { |
| 1268 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1269 | tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1270 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1271 | tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1272 | #endif |
| 1273 | } |
| 1274 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1275 | static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1276 | { |
| 1277 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1278 | tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1279 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1280 | tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), |
| 1281 | addr, TCGV_HIGH(addr), mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1282 | #endif |
| 1283 | } |
| 1284 | |
blueswir1 | 56b8f56 | 2008-02-25 18:29:19 +0000 | [diff] [blame] | 1285 | #define tcg_gen_ld_ptr tcg_gen_ld_i32 |
blueswir1 | a768e4b | 2008-03-16 19:16:37 +0000 | [diff] [blame] | 1286 | #define tcg_gen_discard_ptr tcg_gen_discard_i32 |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 1287 | |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1288 | #else /* TCG_TARGET_REG_BITS == 32 */ |
| 1289 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1290 | static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1291 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1292 | tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1293 | } |
| 1294 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1295 | static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1296 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1297 | tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1298 | } |
| 1299 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1300 | static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1301 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1302 | tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1303 | } |
| 1304 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1305 | static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1306 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1307 | tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1308 | } |
| 1309 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1310 | static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1311 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1312 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1313 | } |
| 1314 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1315 | static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1316 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1317 | tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1318 | } |
| 1319 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1320 | static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1321 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1322 | tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1323 | } |
| 1324 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1325 | static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1326 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1327 | tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1328 | } |
| 1329 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1330 | static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1331 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1332 | tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1333 | } |
| 1334 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1335 | static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1336 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1337 | tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1338 | } |
| 1339 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1340 | static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1341 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1342 | tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1343 | } |
| 1344 | |
blueswir1 | 56b8f56 | 2008-02-25 18:29:19 +0000 | [diff] [blame] | 1345 | #define tcg_gen_ld_ptr tcg_gen_ld_i64 |
blueswir1 | a768e4b | 2008-03-16 19:16:37 +0000 | [diff] [blame] | 1346 | #define tcg_gen_discard_ptr tcg_gen_discard_i64 |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 1347 | |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1348 | #endif /* TCG_TARGET_REG_BITS != 32 */ |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 1349 | |
| 1350 | #if TARGET_LONG_BITS == 64 |
| 1351 | #define TCG_TYPE_TL TCG_TYPE_I64 |
| 1352 | #define tcg_gen_movi_tl tcg_gen_movi_i64 |
| 1353 | #define tcg_gen_mov_tl tcg_gen_mov_i64 |
| 1354 | #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64 |
| 1355 | #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64 |
| 1356 | #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64 |
| 1357 | #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64 |
| 1358 | #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64 |
| 1359 | #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64 |
| 1360 | #define tcg_gen_ld_tl tcg_gen_ld_i64 |
| 1361 | #define tcg_gen_st8_tl tcg_gen_st8_i64 |
| 1362 | #define tcg_gen_st16_tl tcg_gen_st16_i64 |
| 1363 | #define tcg_gen_st32_tl tcg_gen_st32_i64 |
| 1364 | #define tcg_gen_st_tl tcg_gen_st_i64 |
| 1365 | #define tcg_gen_add_tl tcg_gen_add_i64 |
| 1366 | #define tcg_gen_addi_tl tcg_gen_addi_i64 |
| 1367 | #define tcg_gen_sub_tl tcg_gen_sub_i64 |
| 1368 | #define tcg_gen_subi_tl tcg_gen_subi_i64 |
| 1369 | #define tcg_gen_and_tl tcg_gen_and_i64 |
| 1370 | #define tcg_gen_andi_tl tcg_gen_andi_i64 |
| 1371 | #define tcg_gen_or_tl tcg_gen_or_i64 |
| 1372 | #define tcg_gen_ori_tl tcg_gen_ori_i64 |
| 1373 | #define tcg_gen_xor_tl tcg_gen_xor_i64 |
| 1374 | #define tcg_gen_xori_tl tcg_gen_xori_i64 |
| 1375 | #define tcg_gen_shl_tl tcg_gen_shl_i64 |
| 1376 | #define tcg_gen_shli_tl tcg_gen_shli_i64 |
| 1377 | #define tcg_gen_shr_tl tcg_gen_shr_i64 |
| 1378 | #define tcg_gen_shri_tl tcg_gen_shri_i64 |
| 1379 | #define tcg_gen_sar_tl tcg_gen_sar_i64 |
| 1380 | #define tcg_gen_sari_tl tcg_gen_sari_i64 |
blueswir1 | 0cf767d | 2008-03-02 18:20:59 +0000 | [diff] [blame] | 1381 | #define tcg_gen_brcond_tl tcg_gen_brcond_i64 |
blueswir1 | a768e4b | 2008-03-16 19:16:37 +0000 | [diff] [blame] | 1382 | #define tcg_gen_discard_tl tcg_gen_discard_i64 |
blueswir1 | e429073 | 2008-03-22 08:39:04 +0000 | [diff] [blame] | 1383 | #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32 |
| 1384 | #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64 |
| 1385 | #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64 |
| 1386 | #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64 |
| 1387 | #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64 |
| 1388 | #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64 |
blueswir1 | a98824a | 2008-03-13 20:46:42 +0000 | [diff] [blame] | 1389 | #define tcg_const_tl tcg_const_i64 |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 1390 | #else |
| 1391 | #define TCG_TYPE_TL TCG_TYPE_I32 |
| 1392 | #define tcg_gen_movi_tl tcg_gen_movi_i32 |
| 1393 | #define tcg_gen_mov_tl tcg_gen_mov_i32 |
| 1394 | #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32 |
| 1395 | #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32 |
| 1396 | #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32 |
| 1397 | #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32 |
| 1398 | #define tcg_gen_ld32u_tl tcg_gen_ld_i32 |
| 1399 | #define tcg_gen_ld32s_tl tcg_gen_ld_i32 |
| 1400 | #define tcg_gen_ld_tl tcg_gen_ld_i32 |
| 1401 | #define tcg_gen_st8_tl tcg_gen_st8_i32 |
| 1402 | #define tcg_gen_st16_tl tcg_gen_st16_i32 |
| 1403 | #define tcg_gen_st32_tl tcg_gen_st_i32 |
| 1404 | #define tcg_gen_st_tl tcg_gen_st_i32 |
| 1405 | #define tcg_gen_add_tl tcg_gen_add_i32 |
| 1406 | #define tcg_gen_addi_tl tcg_gen_addi_i32 |
| 1407 | #define tcg_gen_sub_tl tcg_gen_sub_i32 |
| 1408 | #define tcg_gen_subi_tl tcg_gen_subi_i32 |
| 1409 | #define tcg_gen_and_tl tcg_gen_and_i32 |
| 1410 | #define tcg_gen_andi_tl tcg_gen_andi_i32 |
| 1411 | #define tcg_gen_or_tl tcg_gen_or_i32 |
| 1412 | #define tcg_gen_ori_tl tcg_gen_ori_i32 |
| 1413 | #define tcg_gen_xor_tl tcg_gen_xor_i32 |
| 1414 | #define tcg_gen_xori_tl tcg_gen_xori_i32 |
| 1415 | #define tcg_gen_shl_tl tcg_gen_shl_i32 |
| 1416 | #define tcg_gen_shli_tl tcg_gen_shli_i32 |
| 1417 | #define tcg_gen_shr_tl tcg_gen_shr_i32 |
| 1418 | #define tcg_gen_shri_tl tcg_gen_shri_i32 |
| 1419 | #define tcg_gen_sar_tl tcg_gen_sar_i32 |
| 1420 | #define tcg_gen_sari_tl tcg_gen_sari_i32 |
blueswir1 | 0cf767d | 2008-03-02 18:20:59 +0000 | [diff] [blame] | 1421 | #define tcg_gen_brcond_tl tcg_gen_brcond_i32 |
blueswir1 | a768e4b | 2008-03-16 19:16:37 +0000 | [diff] [blame] | 1422 | #define tcg_gen_discard_tl tcg_gen_discard_i32 |
blueswir1 | e429073 | 2008-03-22 08:39:04 +0000 | [diff] [blame] | 1423 | #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32 |
| 1424 | #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32 |
| 1425 | #define tcg_gen_extu_i32_tl tcg_gen_mov_i32 |
| 1426 | #define tcg_gen_ext_i32_tl tcg_gen_mov_i32 |
| 1427 | #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64 |
| 1428 | #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64 |
blueswir1 | a98824a | 2008-03-13 20:46:42 +0000 | [diff] [blame] | 1429 | #define tcg_const_tl tcg_const_i32 |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 1430 | #endif |
pbrook | 6ddbc6e | 2008-03-31 03:46:33 +0000 | [diff] [blame^] | 1431 | |
| 1432 | #if TCG_TARGET_REG_BITS == 32 |
| 1433 | #define tcg_gen_addi_ptr tcg_gen_addi_i32 |
| 1434 | #else /* TCG_TARGET_REG_BITS == 32 */ |
| 1435 | #define tcg_gen_addi_ptr tcg_gen_addi_i64 |
| 1436 | #endif /* TCG_TARGET_REG_BITS != 32 */ |
| 1437 | |