bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 1 | /* |
陳韋任 | e965fc3 | 2012-02-06 14:02:55 +0800 | [diff] [blame] | 2 | * emulator main execution loop |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
bellard | 66321a1 | 2005-04-06 20:47:48 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 5 | * |
bellard | 3ef693a | 2003-03-23 20:17:16 +0000 | [diff] [blame] | 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 10 | * |
bellard | 3ef693a | 2003-03-23 20:17:16 +0000 | [diff] [blame] | 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 15 | * |
bellard | 3ef693a | 2003-03-23 20:17:16 +0000 | [diff] [blame] | 16 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 18 | */ |
bellard | e4533c7 | 2003-06-15 19:51:39 +0000 | [diff] [blame] | 19 | #include "config.h" |
Blue Swirl | cea5f9a | 2011-05-15 16:03:25 +0000 | [diff] [blame] | 20 | #include "cpu.h" |
Alex Bennée | 6db8b53 | 2014-08-01 17:08:57 +0100 | [diff] [blame] | 21 | #include "trace.h" |
Paolo Bonzini | 76cad71 | 2012-10-24 11:12:21 +0200 | [diff] [blame] | 22 | #include "disas/disas.h" |
bellard | 7cb69ca | 2008-05-10 10:55:51 +0000 | [diff] [blame] | 23 | #include "tcg.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 24 | #include "qemu/atomic.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 25 | #include "sysemu/qtest.h" |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 26 | #include "qemu/timer.h" |
Paolo Bonzini | 9d82b5a | 2013-08-16 08:26:30 +0200 | [diff] [blame] | 27 | #include "exec/address-spaces.h" |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 28 | #include "qemu/rcu.h" |
Peter Crosthwaite | e1b8932 | 2015-05-30 23:11:45 -0700 | [diff] [blame] | 29 | #include "exec/tb-hash.h" |
Pavel Dovgalyuk | 6220e90 | 2015-09-17 19:23:31 +0300 | [diff] [blame] | 30 | #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) |
| 31 | #include "hw/i386/apic.h" |
| 32 | #endif |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 33 | |
| 34 | /* -icount align implementation. */ |
| 35 | |
| 36 | typedef struct SyncClocks { |
| 37 | int64_t diff_clk; |
| 38 | int64_t last_cpu_icount; |
Sebastian Tanase | 7f7bc14 | 2014-07-25 11:56:32 +0200 | [diff] [blame] | 39 | int64_t realtime_clock; |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 40 | } SyncClocks; |
| 41 | |
| 42 | #if !defined(CONFIG_USER_ONLY) |
| 43 | /* Allow the guest to have a max 3ms advance. |
| 44 | * The difference between the 2 clocks could therefore |
| 45 | * oscillate around 0. |
| 46 | */ |
| 47 | #define VM_CLOCK_ADVANCE 3000000 |
Sebastian Tanase | 7f7bc14 | 2014-07-25 11:56:32 +0200 | [diff] [blame] | 48 | #define THRESHOLD_REDUCE 1.5 |
| 49 | #define MAX_DELAY_PRINT_RATE 2000000000LL |
| 50 | #define MAX_NB_PRINTS 100 |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 51 | |
| 52 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) |
| 53 | { |
| 54 | int64_t cpu_icount; |
| 55 | |
| 56 | if (!icount_align_option) { |
| 57 | return; |
| 58 | } |
| 59 | |
| 60 | cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; |
| 61 | sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount); |
| 62 | sc->last_cpu_icount = cpu_icount; |
| 63 | |
| 64 | if (sc->diff_clk > VM_CLOCK_ADVANCE) { |
| 65 | #ifndef _WIN32 |
| 66 | struct timespec sleep_delay, rem_delay; |
| 67 | sleep_delay.tv_sec = sc->diff_clk / 1000000000LL; |
| 68 | sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL; |
| 69 | if (nanosleep(&sleep_delay, &rem_delay) < 0) { |
Paolo Bonzini | a498d0e | 2015-01-28 10:09:55 +0100 | [diff] [blame] | 70 | sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec; |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 71 | } else { |
| 72 | sc->diff_clk = 0; |
| 73 | } |
| 74 | #else |
| 75 | Sleep(sc->diff_clk / SCALE_MS); |
| 76 | sc->diff_clk = 0; |
| 77 | #endif |
| 78 | } |
| 79 | } |
| 80 | |
Sebastian Tanase | 7f7bc14 | 2014-07-25 11:56:32 +0200 | [diff] [blame] | 81 | static void print_delay(const SyncClocks *sc) |
| 82 | { |
| 83 | static float threshold_delay; |
| 84 | static int64_t last_realtime_clock; |
| 85 | static int nb_prints; |
| 86 | |
| 87 | if (icount_align_option && |
| 88 | sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE && |
| 89 | nb_prints < MAX_NB_PRINTS) { |
| 90 | if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) || |
| 91 | (-sc->diff_clk / (float)1000000000LL < |
| 92 | (threshold_delay - THRESHOLD_REDUCE))) { |
| 93 | threshold_delay = (-sc->diff_clk / 1000000000LL) + 1; |
| 94 | printf("Warning: The guest is now late by %.1f to %.1f seconds\n", |
| 95 | threshold_delay - 1, |
| 96 | threshold_delay); |
| 97 | nb_prints++; |
| 98 | last_realtime_clock = sc->realtime_clock; |
| 99 | } |
| 100 | } |
| 101 | } |
| 102 | |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 103 | static void init_delay_params(SyncClocks *sc, |
| 104 | const CPUState *cpu) |
| 105 | { |
| 106 | if (!icount_align_option) { |
| 107 | return; |
| 108 | } |
Paolo Bonzini | 2e91cc6 | 2015-01-28 10:16:37 +0100 | [diff] [blame] | 109 | sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT); |
| 110 | sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock; |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 111 | sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; |
Sebastian Tanase | 27498be | 2014-07-25 11:56:33 +0200 | [diff] [blame] | 112 | if (sc->diff_clk < max_delay) { |
| 113 | max_delay = sc->diff_clk; |
| 114 | } |
| 115 | if (sc->diff_clk > max_advance) { |
| 116 | max_advance = sc->diff_clk; |
| 117 | } |
Sebastian Tanase | 7f7bc14 | 2014-07-25 11:56:32 +0200 | [diff] [blame] | 118 | |
| 119 | /* Print every 2s max if the guest is late. We limit the number |
| 120 | of printed messages to NB_PRINT_MAX(currently 100) */ |
| 121 | print_delay(sc); |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 122 | } |
| 123 | #else |
| 124 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) |
| 125 | { |
| 126 | } |
| 127 | |
| 128 | static void init_delay_params(SyncClocks *sc, const CPUState *cpu) |
| 129 | { |
| 130 | } |
| 131 | #endif /* CONFIG USER ONLY */ |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 132 | |
Peter Maydell | 7721137 | 2013-02-22 18:10:02 +0000 | [diff] [blame] | 133 | /* Execute a TB, and fix up the CPU state afterwards if necessary */ |
| 134 | static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr) |
| 135 | { |
| 136 | CPUArchState *env = cpu->env_ptr; |
Richard Henderson | 03afa5f | 2013-11-06 17:29:39 +1000 | [diff] [blame] | 137 | uintptr_t next_tb; |
| 138 | |
| 139 | #if defined(DEBUG_DISAS) |
| 140 | if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) { |
| 141 | #if defined(TARGET_I386) |
| 142 | log_cpu_state(cpu, CPU_DUMP_CCOP); |
| 143 | #elif defined(TARGET_M68K) |
| 144 | /* ??? Should not modify env state for dumping. */ |
| 145 | cpu_m68k_flush_flags(env, env->cc_op); |
| 146 | env->cc_op = CC_OP_FLAGS; |
| 147 | env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4); |
| 148 | log_cpu_state(cpu, 0); |
| 149 | #else |
| 150 | log_cpu_state(cpu, 0); |
| 151 | #endif |
| 152 | } |
| 153 | #endif /* DEBUG_DISAS */ |
| 154 | |
Paolo Bonzini | 414b15c | 2015-06-24 14:16:26 +0200 | [diff] [blame] | 155 | cpu->can_do_io = !use_icount; |
Richard Henderson | 03afa5f | 2013-11-06 17:29:39 +1000 | [diff] [blame] | 156 | next_tb = tcg_qemu_tb_exec(env, tb_ptr); |
Pavel Dovgalyuk | 626cf8f | 2014-12-08 10:53:17 +0300 | [diff] [blame] | 157 | cpu->can_do_io = 1; |
Alex Bennée | 6db8b53 | 2014-08-01 17:08:57 +0100 | [diff] [blame] | 158 | trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK), |
| 159 | next_tb & TB_EXIT_MASK); |
| 160 | |
Peter Maydell | 7721137 | 2013-02-22 18:10:02 +0000 | [diff] [blame] | 161 | if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) { |
| 162 | /* We didn't start executing this TB (eg because the instruction |
| 163 | * counter hit zero); we must restore the guest PC to the address |
| 164 | * of the start of the TB. |
| 165 | */ |
Andreas Färber | bdf7ae5 | 2013-06-28 19:31:32 +0200 | [diff] [blame] | 166 | CPUClass *cc = CPU_GET_CLASS(cpu); |
Peter Maydell | 7721137 | 2013-02-22 18:10:02 +0000 | [diff] [blame] | 167 | TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK); |
Andreas Färber | bdf7ae5 | 2013-06-28 19:31:32 +0200 | [diff] [blame] | 168 | if (cc->synchronize_from_tb) { |
| 169 | cc->synchronize_from_tb(cpu, tb); |
| 170 | } else { |
| 171 | assert(cc->set_pc); |
| 172 | cc->set_pc(cpu, tb->pc); |
| 173 | } |
Peter Maydell | 7721137 | 2013-02-22 18:10:02 +0000 | [diff] [blame] | 174 | } |
Peter Maydell | 378df4b | 2013-02-22 18:10:03 +0000 | [diff] [blame] | 175 | if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) { |
| 176 | /* We were asked to stop executing TBs (probably a pending |
| 177 | * interrupt. We've now stopped, so clear the flag. |
| 178 | */ |
| 179 | cpu->tcg_exit_req = 0; |
| 180 | } |
Peter Maydell | 7721137 | 2013-02-22 18:10:02 +0000 | [diff] [blame] | 181 | return next_tb; |
| 182 | } |
| 183 | |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 184 | /* Execute the code without caching the generated code. An interpreter |
| 185 | could be used if available. */ |
Peter Crosthwaite | ea3e984 | 2015-06-18 10:24:55 -0700 | [diff] [blame] | 186 | static void cpu_exec_nocache(CPUState *cpu, int max_cycles, |
Blue Swirl | cea5f9a | 2011-05-15 16:03:25 +0000 | [diff] [blame] | 187 | TranslationBlock *orig_tb) |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 188 | { |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 189 | TranslationBlock *tb; |
| 190 | |
| 191 | /* Should never happen. |
| 192 | We only end up here when an existing TB is too long. */ |
| 193 | if (max_cycles > CF_COUNT_MASK) |
| 194 | max_cycles = CF_COUNT_MASK; |
| 195 | |
Sergey Fedorov | 02d57ea | 2015-06-30 12:35:09 +0300 | [diff] [blame] | 196 | tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags, |
Pavel Dovgalyuk | d8a499f | 2014-11-26 13:40:16 +0300 | [diff] [blame] | 197 | max_cycles | CF_NOCACHE); |
Sergey Fedorov | 02d57ea | 2015-06-30 12:35:09 +0300 | [diff] [blame] | 198 | tb->orig_tb = tcg_ctx.tb_ctx.tb_invalidated_flag ? NULL : orig_tb; |
Andreas Färber | d77953b | 2013-01-16 19:29:31 +0100 | [diff] [blame] | 199 | cpu->current_tb = tb; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 200 | /* execute the generated code */ |
Alex Bennée | 6db8b53 | 2014-08-01 17:08:57 +0100 | [diff] [blame] | 201 | trace_exec_tb_nocache(tb, tb->pc); |
Peter Maydell | 7721137 | 2013-02-22 18:10:02 +0000 | [diff] [blame] | 202 | cpu_tb_exec(cpu, tb->tc_ptr); |
Andreas Färber | d77953b | 2013-01-16 19:29:31 +0100 | [diff] [blame] | 203 | cpu->current_tb = NULL; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 204 | tb_phys_invalidate(tb, -1); |
| 205 | tb_free(tb); |
| 206 | } |
| 207 | |
Paolo Bonzini | 9fd1a94 | 2015-08-11 11:33:24 +0200 | [diff] [blame] | 208 | static TranslationBlock *tb_find_physical(CPUState *cpu, |
| 209 | target_ulong pc, |
| 210 | target_ulong cs_base, |
| 211 | uint64_t flags) |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 212 | { |
Peter Crosthwaite | ea3e984 | 2015-06-18 10:24:55 -0700 | [diff] [blame] | 213 | CPUArchState *env = (CPUArchState *)cpu->env_ptr; |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 214 | TranslationBlock *tb, **ptb1; |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 215 | unsigned int h; |
Blue Swirl | 337fc75 | 2011-09-04 11:06:22 +0000 | [diff] [blame] | 216 | tb_page_addr_t phys_pc, phys_page1; |
Paul Brook | 41c1b1c | 2010-03-12 16:54:58 +0000 | [diff] [blame] | 217 | target_ulong virt_page2; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 218 | |
Evgeny Voevodin | 5e5f07e | 2013-02-01 01:47:23 +0700 | [diff] [blame] | 219 | tcg_ctx.tb_ctx.tb_invalidated_flag = 0; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 220 | |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 221 | /* find translated block using physical mappings */ |
Paul Brook | 41c1b1c | 2010-03-12 16:54:58 +0000 | [diff] [blame] | 222 | phys_pc = get_page_addr_code(env, pc); |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 223 | phys_page1 = phys_pc & TARGET_PAGE_MASK; |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 224 | h = tb_phys_hash_func(phys_pc); |
Evgeny Voevodin | 5e5f07e | 2013-02-01 01:47:23 +0700 | [diff] [blame] | 225 | ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h]; |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 226 | for(;;) { |
| 227 | tb = *ptb1; |
Paolo Bonzini | 9fd1a94 | 2015-08-11 11:33:24 +0200 | [diff] [blame] | 228 | if (!tb) { |
| 229 | return NULL; |
| 230 | } |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 231 | if (tb->pc == pc && |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 232 | tb->page_addr[0] == phys_page1 && |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 233 | tb->cs_base == cs_base && |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 234 | tb->flags == flags) { |
| 235 | /* check next page if needed */ |
| 236 | if (tb->page_addr[1] != -1) { |
Blue Swirl | 337fc75 | 2011-09-04 11:06:22 +0000 | [diff] [blame] | 237 | tb_page_addr_t phys_page2; |
| 238 | |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 239 | virt_page2 = (pc & TARGET_PAGE_MASK) + |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 240 | TARGET_PAGE_SIZE; |
Paul Brook | 41c1b1c | 2010-03-12 16:54:58 +0000 | [diff] [blame] | 241 | phys_page2 = get_page_addr_code(env, virt_page2); |
Paolo Bonzini | 9fd1a94 | 2015-08-11 11:33:24 +0200 | [diff] [blame] | 242 | if (tb->page_addr[1] == phys_page2) { |
| 243 | break; |
| 244 | } |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 245 | } else { |
Paolo Bonzini | 9fd1a94 | 2015-08-11 11:33:24 +0200 | [diff] [blame] | 246 | break; |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 247 | } |
| 248 | } |
| 249 | ptb1 = &tb->phys_hash_next; |
| 250 | } |
Paolo Bonzini | 9fd1a94 | 2015-08-11 11:33:24 +0200 | [diff] [blame] | 251 | |
| 252 | /* Move the TB to the head of the list */ |
| 253 | *ptb1 = tb->phys_hash_next; |
| 254 | tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h]; |
| 255 | tcg_ctx.tb_ctx.tb_phys_hash[h] = tb; |
| 256 | return tb; |
| 257 | } |
| 258 | |
| 259 | static TranslationBlock *tb_find_slow(CPUState *cpu, |
| 260 | target_ulong pc, |
| 261 | target_ulong cs_base, |
| 262 | uint64_t flags) |
| 263 | { |
| 264 | TranslationBlock *tb; |
| 265 | |
| 266 | tb = tb_find_physical(cpu, pc, cs_base, flags); |
| 267 | if (tb) { |
| 268 | goto found; |
| 269 | } |
| 270 | |
| 271 | #ifdef CONFIG_USER_ONLY |
| 272 | /* mmap_lock is needed by tb_gen_code, and mmap_lock must be |
| 273 | * taken outside tb_lock. Since we're momentarily dropping |
| 274 | * tb_lock, there's a chance that our desired tb has been |
| 275 | * translated. |
| 276 | */ |
| 277 | tb_unlock(); |
| 278 | mmap_lock(); |
| 279 | tb_lock(); |
| 280 | tb = tb_find_physical(cpu, pc, cs_base, flags); |
| 281 | if (tb) { |
| 282 | mmap_unlock(); |
| 283 | goto found; |
| 284 | } |
| 285 | #endif |
| 286 | |
| 287 | /* if no translated code available, then translate it now */ |
Andreas Färber | 648f034 | 2013-09-01 17:43:17 +0200 | [diff] [blame] | 288 | tb = tb_gen_code(cpu, pc, cs_base, flags, 0); |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 289 | |
Paolo Bonzini | 9fd1a94 | 2015-08-11 11:33:24 +0200 | [diff] [blame] | 290 | #ifdef CONFIG_USER_ONLY |
| 291 | mmap_unlock(); |
| 292 | #endif |
| 293 | |
| 294 | found: |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 295 | /* we add the TB in the virtual pc hash table */ |
Andreas Färber | 8cd7043 | 2013-08-26 06:03:38 +0200 | [diff] [blame] | 296 | cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb; |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 297 | return tb; |
| 298 | } |
| 299 | |
Peter Crosthwaite | ea3e984 | 2015-06-18 10:24:55 -0700 | [diff] [blame] | 300 | static inline TranslationBlock *tb_find_fast(CPUState *cpu) |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 301 | { |
Peter Crosthwaite | ea3e984 | 2015-06-18 10:24:55 -0700 | [diff] [blame] | 302 | CPUArchState *env = (CPUArchState *)cpu->env_ptr; |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 303 | TranslationBlock *tb; |
| 304 | target_ulong cs_base, pc; |
aliguori | 6b91754 | 2008-11-18 19:46:41 +0000 | [diff] [blame] | 305 | int flags; |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 306 | |
| 307 | /* we record a subset of the CPU state. It will |
| 308 | always be the same before a given translated block |
| 309 | is executed. */ |
aliguori | 6b91754 | 2008-11-18 19:46:41 +0000 | [diff] [blame] | 310 | cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); |
Andreas Färber | 8cd7043 | 2013-08-26 06:03:38 +0200 | [diff] [blame] | 311 | tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]; |
ths | 551bd27 | 2008-07-03 17:57:36 +0000 | [diff] [blame] | 312 | if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base || |
| 313 | tb->flags != flags)) { |
Peter Crosthwaite | ea3e984 | 2015-06-18 10:24:55 -0700 | [diff] [blame] | 314 | tb = tb_find_slow(cpu, pc, cs_base, flags); |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 315 | } |
| 316 | return tb; |
| 317 | } |
| 318 | |
Peter Crosthwaite | ea3e984 | 2015-06-18 10:24:55 -0700 | [diff] [blame] | 319 | static void cpu_handle_debug_exception(CPUState *cpu) |
Jan Kiszka | 1009d2e | 2011-03-15 12:26:13 +0100 | [diff] [blame] | 320 | { |
Peter Maydell | 86025ee | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 321 | CPUClass *cc = CPU_GET_CLASS(cpu); |
Jan Kiszka | 1009d2e | 2011-03-15 12:26:13 +0100 | [diff] [blame] | 322 | CPUWatchpoint *wp; |
| 323 | |
Andreas Färber | ff4700b | 2013-08-26 18:23:18 +0200 | [diff] [blame] | 324 | if (!cpu->watchpoint_hit) { |
| 325 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { |
Jan Kiszka | 1009d2e | 2011-03-15 12:26:13 +0100 | [diff] [blame] | 326 | wp->flags &= ~BP_WATCHPOINT_HIT; |
| 327 | } |
| 328 | } |
Peter Maydell | 86025ee | 2014-09-12 14:06:48 +0100 | [diff] [blame] | 329 | |
| 330 | cc->debug_excp_handler(cpu); |
Jan Kiszka | 1009d2e | 2011-03-15 12:26:13 +0100 | [diff] [blame] | 331 | } |
| 332 | |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 333 | /* main execution loop */ |
| 334 | |
Peter Crosthwaite | ea3e984 | 2015-06-18 10:24:55 -0700 | [diff] [blame] | 335 | int cpu_exec(CPUState *cpu) |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 336 | { |
Andreas Färber | 97a8ea5 | 2013-02-02 10:57:51 +0100 | [diff] [blame] | 337 | CPUClass *cc = CPU_GET_CLASS(cpu); |
Andreas Färber | 693fa55 | 2013-12-24 03:18:12 +0100 | [diff] [blame] | 338 | #ifdef TARGET_I386 |
| 339 | X86CPU *x86_cpu = X86_CPU(cpu); |
Peter Crosthwaite | ea3e984 | 2015-06-18 10:24:55 -0700 | [diff] [blame] | 340 | CPUArchState *env = &x86_cpu->env; |
Andreas Färber | 693fa55 | 2013-12-24 03:18:12 +0100 | [diff] [blame] | 341 | #endif |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 342 | int ret, interrupt_request; |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 343 | TranslationBlock *tb; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 344 | uint8_t *tc_ptr; |
Richard Henderson | 3e9bd63 | 2013-08-20 14:40:25 -0700 | [diff] [blame] | 345 | uintptr_t next_tb; |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 346 | SyncClocks sc; |
| 347 | |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 348 | if (cpu->halted) { |
Pavel Dovgalyuk | 6220e90 | 2015-09-17 19:23:31 +0300 | [diff] [blame] | 349 | #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) |
| 350 | if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { |
| 351 | apic_poll_irq(x86_cpu->apic_state); |
| 352 | cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); |
| 353 | } |
| 354 | #endif |
Andreas Färber | 3993c6b | 2012-05-03 06:43:49 +0200 | [diff] [blame] | 355 | if (!cpu_has_work(cpu)) { |
Paolo Bonzini | eda48c3 | 2011-03-12 17:43:56 +0100 | [diff] [blame] | 356 | return EXCP_HALTED; |
| 357 | } |
| 358 | |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 359 | cpu->halted = 0; |
Paolo Bonzini | eda48c3 | 2011-03-12 17:43:56 +0100 | [diff] [blame] | 360 | } |
bellard | 5a1e3cf | 2005-11-23 21:02:53 +0000 | [diff] [blame] | 361 | |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 362 | current_cpu = cpu; |
Paolo Bonzini | 9373e63 | 2015-08-18 06:24:34 -0700 | [diff] [blame] | 363 | atomic_mb_set(&tcg_current_cpu, cpu); |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 364 | rcu_read_lock(); |
| 365 | |
Paolo Bonzini | aed807c | 2015-08-18 06:43:15 -0700 | [diff] [blame] | 366 | if (unlikely(atomic_mb_read(&exit_request))) { |
Andreas Färber | fcd7d00 | 2012-12-17 08:02:44 +0100 | [diff] [blame] | 367 | cpu->exit_request = 1; |
Marcelo Tosatti | 1a28cac | 2010-05-04 09:45:20 -0300 | [diff] [blame] | 368 | } |
| 369 | |
Richard Henderson | cffe7b3 | 2014-09-13 09:45:12 -0700 | [diff] [blame] | 370 | cc->cpu_exec_enter(cpu); |
bellard | 9d27abd | 2003-05-10 13:13:54 +0000 | [diff] [blame] | 371 | |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 372 | /* Calculate difference between guest clock and host clock. |
| 373 | * This delay includes the delay of the last cycle, so |
| 374 | * what we have to do is sleep until it is 0. As for the |
| 375 | * advance/delay we gain here, we try to fix it next time. |
| 376 | */ |
| 377 | init_delay_params(&sc, cpu); |
| 378 | |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 379 | /* prepare setjmp context for exception handling */ |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 380 | for(;;) { |
Andreas Färber | 6f03bef | 2013-08-26 06:22:03 +0200 | [diff] [blame] | 381 | if (sigsetjmp(cpu->jmp_env, 0) == 0) { |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 382 | /* if an exception is pending, we execute it here */ |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 383 | if (cpu->exception_index >= 0) { |
| 384 | if (cpu->exception_index >= EXCP_INTERRUPT) { |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 385 | /* exit request from the cpu execution loop */ |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 386 | ret = cpu->exception_index; |
Jan Kiszka | 1009d2e | 2011-03-15 12:26:13 +0100 | [diff] [blame] | 387 | if (ret == EXCP_DEBUG) { |
Peter Crosthwaite | ea3e984 | 2015-06-18 10:24:55 -0700 | [diff] [blame] | 388 | cpu_handle_debug_exception(cpu); |
Jan Kiszka | 1009d2e | 2011-03-15 12:26:13 +0100 | [diff] [blame] | 389 | } |
Pavel Dovgalyuk | e511b4d | 2014-11-26 13:39:20 +0300 | [diff] [blame] | 390 | cpu->exception_index = -1; |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 391 | break; |
aurel32 | 72d239e | 2009-01-14 19:40:27 +0000 | [diff] [blame] | 392 | } else { |
| 393 | #if defined(CONFIG_USER_ONLY) |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 394 | /* if user mode only, we simulate a fake exception |
ths | 9f08349 | 2006-12-07 18:28:42 +0000 | [diff] [blame] | 395 | which will be handled outside the cpu execution |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 396 | loop */ |
bellard | 83479e7 | 2003-06-25 16:12:37 +0000 | [diff] [blame] | 397 | #if defined(TARGET_I386) |
Andreas Färber | 97a8ea5 | 2013-02-02 10:57:51 +0100 | [diff] [blame] | 398 | cc->do_interrupt(cpu); |
bellard | 83479e7 | 2003-06-25 16:12:37 +0000 | [diff] [blame] | 399 | #endif |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 400 | ret = cpu->exception_index; |
Pavel Dovgalyuk | e511b4d | 2014-11-26 13:39:20 +0300 | [diff] [blame] | 401 | cpu->exception_index = -1; |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 402 | break; |
aurel32 | 72d239e | 2009-01-14 19:40:27 +0000 | [diff] [blame] | 403 | #else |
Andreas Färber | 97a8ea5 | 2013-02-02 10:57:51 +0100 | [diff] [blame] | 404 | cc->do_interrupt(cpu); |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 405 | cpu->exception_index = -1; |
aurel32 | 72d239e | 2009-01-14 19:40:27 +0000 | [diff] [blame] | 406 | #endif |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 407 | } |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 408 | } |
bellard | 9df217a | 2005-02-10 22:05:51 +0000 | [diff] [blame] | 409 | |
blueswir1 | b5fc09a | 2008-05-04 06:38:18 +0000 | [diff] [blame] | 410 | next_tb = 0; /* force lookup of first TB */ |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 411 | for(;;) { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 412 | interrupt_request = cpu->interrupt_request; |
malc | e1638bd | 2008-11-06 18:54:46 +0000 | [diff] [blame] | 413 | if (unlikely(interrupt_request)) { |
Andreas Färber | ed2803d | 2013-06-21 20:20:45 +0200 | [diff] [blame] | 414 | if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { |
malc | e1638bd | 2008-11-06 18:54:46 +0000 | [diff] [blame] | 415 | /* Mask out external interrupts for this step. */ |
Richard Henderson | 3125f76 | 2011-05-04 13:34:25 -0700 | [diff] [blame] | 416 | interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; |
malc | e1638bd | 2008-11-06 18:54:46 +0000 | [diff] [blame] | 417 | } |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 418 | if (interrupt_request & CPU_INTERRUPT_DEBUG) { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 419 | cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 420 | cpu->exception_index = EXCP_DEBUG; |
Andreas Färber | 5638d18 | 2013-08-27 17:52:12 +0200 | [diff] [blame] | 421 | cpu_loop_exit(cpu); |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 422 | } |
balrog | a90b731 | 2007-05-01 01:28:01 +0000 | [diff] [blame] | 423 | if (interrupt_request & CPU_INTERRUPT_HALT) { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 424 | cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; |
| 425 | cpu->halted = 1; |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 426 | cpu->exception_index = EXCP_HLT; |
Andreas Färber | 5638d18 | 2013-08-27 17:52:12 +0200 | [diff] [blame] | 427 | cpu_loop_exit(cpu); |
balrog | a90b731 | 2007-05-01 01:28:01 +0000 | [diff] [blame] | 428 | } |
bellard | 68a7931 | 2003-06-30 13:12:32 +0000 | [diff] [blame] | 429 | #if defined(TARGET_I386) |
Paolo Bonzini | 4a92a55 | 2013-03-05 15:35:17 +0100 | [diff] [blame] | 430 | if (interrupt_request & CPU_INTERRUPT_INIT) { |
| 431 | cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0); |
| 432 | do_cpu_init(x86_cpu); |
| 433 | cpu->exception_index = EXCP_HALTED; |
| 434 | cpu_loop_exit(cpu); |
| 435 | } |
| 436 | #else |
| 437 | if (interrupt_request & CPU_INTERRUPT_RESET) { |
| 438 | cpu_reset(cpu); |
| 439 | } |
| 440 | #endif |
Richard Henderson | 9585db6 | 2014-09-13 09:45:17 -0700 | [diff] [blame] | 441 | /* The target hook has 3 exit conditions: |
| 442 | False when the interrupt isn't processed, |
| 443 | True when it is, and we should restart on a new TB, |
| 444 | and via longjmp via cpu_loop_exit. */ |
| 445 | if (cc->cpu_exec_interrupt(cpu, interrupt_request)) { |
| 446 | next_tb = 0; |
| 447 | } |
| 448 | /* Don't use the cached interrupt_request value, |
| 449 | do_interrupt may have updated the EXITTB flag. */ |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 450 | if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) { |
| 451 | cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB; |
bellard | bf3e8bf | 2004-02-16 21:58:54 +0000 | [diff] [blame] | 452 | /* ensure that no TB jump will be modified as |
| 453 | the program flow was changed */ |
blueswir1 | b5fc09a | 2008-05-04 06:38:18 +0000 | [diff] [blame] | 454 | next_tb = 0; |
bellard | bf3e8bf | 2004-02-16 21:58:54 +0000 | [diff] [blame] | 455 | } |
aurel32 | be214e6 | 2009-03-06 21:48:00 +0000 | [diff] [blame] | 456 | } |
Andreas Färber | fcd7d00 | 2012-12-17 08:02:44 +0100 | [diff] [blame] | 457 | if (unlikely(cpu->exit_request)) { |
| 458 | cpu->exit_request = 0; |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 459 | cpu->exception_index = EXCP_INTERRUPT; |
Andreas Färber | 5638d18 | 2013-08-27 17:52:12 +0200 | [diff] [blame] | 460 | cpu_loop_exit(cpu); |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 461 | } |
KONRAD Frederic | 677ef62 | 2015-08-10 17:27:02 +0200 | [diff] [blame] | 462 | tb_lock(); |
Peter Crosthwaite | ea3e984 | 2015-06-18 10:24:55 -0700 | [diff] [blame] | 463 | tb = tb_find_fast(cpu); |
pbrook | d597536 | 2008-06-07 20:50:51 +0000 | [diff] [blame] | 464 | /* Note: we do it here to avoid a gcc bug on Mac OS X when |
| 465 | doing it in tb_find_slow */ |
Evgeny Voevodin | 5e5f07e | 2013-02-01 01:47:23 +0700 | [diff] [blame] | 466 | if (tcg_ctx.tb_ctx.tb_invalidated_flag) { |
pbrook | d597536 | 2008-06-07 20:50:51 +0000 | [diff] [blame] | 467 | /* as some TB could have been invalidated because |
| 468 | of memory exceptions while generating the code, we |
| 469 | must recompute the hash index here */ |
| 470 | next_tb = 0; |
Evgeny Voevodin | 5e5f07e | 2013-02-01 01:47:23 +0700 | [diff] [blame] | 471 | tcg_ctx.tb_ctx.tb_invalidated_flag = 0; |
pbrook | d597536 | 2008-06-07 20:50:51 +0000 | [diff] [blame] | 472 | } |
Peter Maydell | c30d1ae | 2013-04-11 21:21:46 +0100 | [diff] [blame] | 473 | if (qemu_loglevel_mask(CPU_LOG_EXEC)) { |
| 474 | qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n", |
| 475 | tb->tc_ptr, tb->pc, lookup_symbol(tb->pc)); |
| 476 | } |
bellard | 8a40a18 | 2005-11-20 10:35:40 +0000 | [diff] [blame] | 477 | /* see if we can patch the calling TB. When the TB |
| 478 | spans two pages, we cannot safely do a direct |
| 479 | jump. */ |
Richard Henderson | 89a82cd | 2015-09-16 15:33:53 -0700 | [diff] [blame] | 480 | if (next_tb != 0 && tb->page_addr[1] == -1 |
| 481 | && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { |
Peter Maydell | 0980011 | 2013-02-22 18:10:00 +0000 | [diff] [blame] | 482 | tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK), |
| 483 | next_tb & TB_EXIT_MASK, tb); |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 484 | } |
KONRAD Frederic | 677ef62 | 2015-08-10 17:27:02 +0200 | [diff] [blame] | 485 | tb_unlock(); |
Andreas Färber | fcd7d00 | 2012-12-17 08:02:44 +0100 | [diff] [blame] | 486 | if (likely(!cpu->exit_request)) { |
Alex Bennée | 6db8b53 | 2014-08-01 17:08:57 +0100 | [diff] [blame] | 487 | trace_exec_tb(tb, tb->pc); |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 488 | tc_ptr = tb->tc_ptr; |
陳韋任 | e965fc3 | 2012-02-06 14:02:55 +0800 | [diff] [blame] | 489 | /* execute the generated code */ |
Paolo Bonzini | b0a46fa | 2015-08-18 06:32:02 -0700 | [diff] [blame] | 490 | cpu->current_tb = tb; |
Peter Maydell | 7721137 | 2013-02-22 18:10:02 +0000 | [diff] [blame] | 491 | next_tb = cpu_tb_exec(cpu, tc_ptr); |
Paolo Bonzini | b0a46fa | 2015-08-18 06:32:02 -0700 | [diff] [blame] | 492 | cpu->current_tb = NULL; |
Peter Maydell | 378df4b | 2013-02-22 18:10:03 +0000 | [diff] [blame] | 493 | switch (next_tb & TB_EXIT_MASK) { |
| 494 | case TB_EXIT_REQUESTED: |
| 495 | /* Something asked us to stop executing |
| 496 | * chained TBs; just continue round the main |
| 497 | * loop. Whatever requested the exit will also |
| 498 | * have set something else (eg exit_request or |
| 499 | * interrupt_request) which we will handle |
Paolo Bonzini | ab096a7 | 2015-08-18 06:34:19 -0700 | [diff] [blame] | 500 | * next time around the loop. But we need to |
| 501 | * ensure the tcg_exit_req read in generated code |
| 502 | * comes before the next read of cpu->exit_request |
| 503 | * or cpu->interrupt_request. |
Peter Maydell | 378df4b | 2013-02-22 18:10:03 +0000 | [diff] [blame] | 504 | */ |
Paolo Bonzini | ab096a7 | 2015-08-18 06:34:19 -0700 | [diff] [blame] | 505 | smp_rmb(); |
Peter Maydell | 378df4b | 2013-02-22 18:10:03 +0000 | [diff] [blame] | 506 | next_tb = 0; |
| 507 | break; |
| 508 | case TB_EXIT_ICOUNT_EXPIRED: |
| 509 | { |
ths | bf20dc0 | 2008-06-30 17:22:19 +0000 | [diff] [blame] | 510 | /* Instruction counter expired. */ |
Paolo Bonzini | 52851b7 | 2015-01-26 12:12:22 +0100 | [diff] [blame] | 511 | int insns_left = cpu->icount_decr.u32; |
Andreas Färber | efee734 | 2013-08-26 05:39:29 +0200 | [diff] [blame] | 512 | if (cpu->icount_extra && insns_left >= 0) { |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 513 | /* Refill decrementer and continue execution. */ |
Andreas Färber | efee734 | 2013-08-26 05:39:29 +0200 | [diff] [blame] | 514 | cpu->icount_extra += insns_left; |
Paolo Bonzini | 52851b7 | 2015-01-26 12:12:22 +0100 | [diff] [blame] | 515 | insns_left = MIN(0xffff, cpu->icount_extra); |
Andreas Färber | efee734 | 2013-08-26 05:39:29 +0200 | [diff] [blame] | 516 | cpu->icount_extra -= insns_left; |
Andreas Färber | 28ecfd7 | 2013-08-26 05:51:49 +0200 | [diff] [blame] | 517 | cpu->icount_decr.u16.low = insns_left; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 518 | } else { |
| 519 | if (insns_left > 0) { |
| 520 | /* Execute remaining instructions. */ |
Paolo Bonzini | 52851b7 | 2015-01-26 12:12:22 +0100 | [diff] [blame] | 521 | tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK); |
Peter Crosthwaite | ea3e984 | 2015-06-18 10:24:55 -0700 | [diff] [blame] | 522 | cpu_exec_nocache(cpu, insns_left, tb); |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 523 | align_clocks(&sc, cpu); |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 524 | } |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 525 | cpu->exception_index = EXCP_INTERRUPT; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 526 | next_tb = 0; |
Andreas Färber | 5638d18 | 2013-08-27 17:52:12 +0200 | [diff] [blame] | 527 | cpu_loop_exit(cpu); |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 528 | } |
Peter Maydell | 378df4b | 2013-02-22 18:10:03 +0000 | [diff] [blame] | 529 | break; |
| 530 | } |
| 531 | default: |
| 532 | break; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 533 | } |
| 534 | } |
Sebastian Tanase | c2aa5f8 | 2014-07-25 11:56:31 +0200 | [diff] [blame] | 535 | /* Try to align the host and virtual clocks |
| 536 | if the guest is in advance */ |
| 537 | align_clocks(&sc, cpu); |
bellard | 4cbf74b | 2003-08-10 21:48:43 +0000 | [diff] [blame] | 538 | /* reset soft MMU for next block (it can currently |
| 539 | only be set by a memory fault) */ |
ths | 50a518e | 2007-06-03 18:52:15 +0000 | [diff] [blame] | 540 | } /* for(;;) */ |
Jan Kiszka | 0d10193 | 2011-07-02 09:50:51 +0200 | [diff] [blame] | 541 | } else { |
Stefan Weil | 0448f5f | 2015-09-26 13:23:26 +0200 | [diff] [blame] | 542 | #if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6) |
| 543 | /* Some compilers wrongly smash all local variables after |
| 544 | * siglongjmp. There were bug reports for gcc 4.5.0 and clang. |
| 545 | * Reload essential local variables here for those compilers. |
| 546 | * Newer versions of gcc would complain about this code (-Wclobbered). */ |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 547 | cpu = current_cpu; |
Juergen Lock | 6c78f29 | 2013-10-03 16:09:37 +0200 | [diff] [blame] | 548 | cc = CPU_GET_CLASS(cpu); |
Andreas Färber | 693fa55 | 2013-12-24 03:18:12 +0100 | [diff] [blame] | 549 | #ifdef TARGET_I386 |
| 550 | x86_cpu = X86_CPU(cpu); |
Peter Crosthwaite | ea3e984 | 2015-06-18 10:24:55 -0700 | [diff] [blame] | 551 | env = &x86_cpu->env; |
Andreas Färber | 693fa55 | 2013-12-24 03:18:12 +0100 | [diff] [blame] | 552 | #endif |
Stefan Weil | 0448f5f | 2015-09-26 13:23:26 +0200 | [diff] [blame] | 553 | #else /* buggy compiler */ |
| 554 | /* Assert that the compiler does not smash local variables. */ |
| 555 | g_assert(cpu == current_cpu); |
| 556 | g_assert(cc == CPU_GET_CLASS(cpu)); |
| 557 | #ifdef TARGET_I386 |
| 558 | g_assert(x86_cpu == X86_CPU(cpu)); |
| 559 | g_assert(env == &x86_cpu->env); |
| 560 | #endif |
| 561 | #endif /* buggy compiler */ |
| 562 | cpu->can_do_io = 1; |
KONRAD Frederic | 677ef62 | 2015-08-10 17:27:02 +0200 | [diff] [blame] | 563 | tb_lock_reset(); |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 564 | } |
bellard | 3fb2ded | 2003-06-24 13:22:59 +0000 | [diff] [blame] | 565 | } /* for(;;) */ |
| 566 | |
Richard Henderson | cffe7b3 | 2014-09-13 09:45:12 -0700 | [diff] [blame] | 567 | cc->cpu_exec_exit(cpu); |
Paolo Bonzini | 79e2b9a | 2015-01-21 12:09:14 +0100 | [diff] [blame] | 568 | rcu_read_unlock(); |
pbrook | 1057eaa | 2007-02-04 13:37:44 +0000 | [diff] [blame] | 569 | |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 570 | /* fail safe : never use current_cpu outside cpu_exec() */ |
| 571 | current_cpu = NULL; |
Paolo Bonzini | 9373e63 | 2015-08-18 06:24:34 -0700 | [diff] [blame] | 572 | |
| 573 | /* Does not need atomic_mb_set because a spurious wakeup is okay. */ |
| 574 | atomic_set(&tcg_current_cpu, NULL); |
bellard | 7d13299 | 2003-03-06 23:23:54 +0000 | [diff] [blame] | 575 | return ret; |
| 576 | } |