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Stefan Hajnoczi94a420b2010-05-22 17:52:39 +01001# Trace events for debugging and performance instrumentation
2#
3# This file is processed by the tracetool script during the build.
4#
5# To add a new trace event:
6#
7# 1. Choose a name for the trace event. Declare its arguments and format
8# string.
9#
10# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() ->
11# trace_multiwrite_cb(). The source file must #include "trace.h".
12#
13# Format of a trace event:
14#
Stefan Hajnoczi1e2cf2b2010-05-24 11:32:09 +010015# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>"
Stefan Hajnoczi94a420b2010-05-22 17:52:39 +010016#
Frediano Ziglioa74cd8c2011-08-31 09:25:35 +020017# Example: g_malloc(size_t size) "size %zu"
Stefan Hajnoczi94a420b2010-05-22 17:52:39 +010018#
Stefan Hajnoczi1e2cf2b2010-05-24 11:32:09 +010019# The "disable" keyword will build without the trace event.
Stefan Hajnoczi1e2cf2b2010-05-24 11:32:09 +010020#
Stefan Hajnoczi94a420b2010-05-22 17:52:39 +010021# The <name> must be a valid as a C function name.
22#
23# Types should be standard C types. Use void * for pointers because the trace
24# system may not have the necessary headers included.
25#
26# The <format-string> should be a sprintf()-compatible format string.
Stefan Hajnoczicd245a12010-05-22 18:09:25 +010027
28# qemu-malloc.c
Frediano Ziglioa74cd8c2011-08-31 09:25:35 +020029g_malloc(size_t size, void *ptr) "size %zu ptr %p"
30g_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p"
31g_free(void *ptr) "ptr %p"
Stefan Hajnoczicd245a12010-05-22 18:09:25 +010032
33# osdep.c
Lluís47f08d72011-08-31 20:31:58 +020034qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p"
35qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p"
36qemu_vfree(void *ptr) "ptr %p"
Stefan Hajnoczi6d519a52010-05-22 18:15:08 +010037
Stefan Hajnoczi64979a42010-05-24 13:19:21 +010038# hw/virtio.c
Lluís47f08d72011-08-31 20:31:58 +020039virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"
40virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
41virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u"
42virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p"
43virtio_irq(void *vq) "vq %p"
44virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
Stefan Hajnoczi64979a42010-05-24 13:19:21 +010045
Amit Shah49e3fdd2011-07-05 16:36:39 +053046# hw/virtio-serial-bus.c
Lluís47f08d72011-08-31 20:31:58 +020047virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u"
48virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d"
49virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u"
50virtio_serial_handle_control_message_port(unsigned int port) "port %u"
Amit Shah49e3fdd2011-07-05 16:36:39 +053051
Amit Shahd02e4fa2011-07-05 16:37:49 +053052# hw/virtio-console.c
Lluís47f08d72011-08-31 20:31:58 +020053virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd"
54virtio_console_chr_read(unsigned int port, int size) "port %u, size %d"
55virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
Amit Shahd02e4fa2011-07-05 16:37:49 +053056
Stefan Hajnoczi6d519a52010-05-22 18:15:08 +010057# block.c
Lluís47f08d72011-08-31 20:31:58 +020058multiwrite_cb(void *mcb, int ret) "mcb %p ret %d"
59bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d"
60bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p"
61bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d"
62bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p"
63bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
64bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
65bdrv_set_locked(void *bs, int locked) "bs %p locked %d"
66bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
67bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
68bdrv_co_io(int is_write, void *acb) "is_write %d acb %p"
Stefan Hajnoczi6d519a52010-05-22 18:15:08 +010069
70# hw/virtio-blk.c
Lluís47f08d72011-08-31 20:31:58 +020071virtio_blk_req_complete(void *req, int status) "req %p status %d"
72virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
73virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
Stefan Hajnoczi6d519a52010-05-22 18:15:08 +010074
75# posix-aio-compat.c
Lluís47f08d72011-08-31 20:31:58 +020076paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
77paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d"
78paio_cancel(void *acb, void *opaque) "acb %p opaque %p"
Prerna Saxenabd3c9aa2010-08-11 17:15:11 +053079
80# ioport.c
Lluís47f08d72011-08-31 20:31:58 +020081cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u"
82cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u"
Prerna Saxena62dd89d2010-08-11 17:16:03 +053083
84# balloon.c
85# Since requests are raised via monitor, not many tracepoints are needed.
Lluís47f08d72011-08-31 20:31:58 +020086balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
Blue Swirld8023f32010-10-20 16:41:28 +000087
88# hw/apic.c
Lluís47f08d72011-08-31 20:31:58 +020089apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
90apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
91cpu_set_apic_base(uint64_t val) "%016"PRIx64""
92cpu_get_apic_base(uint64_t val) "%016"PRIx64""
93apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
94apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
Blue Swirld8023f32010-10-20 16:41:28 +000095# coalescing
Lluís47f08d72011-08-31 20:31:58 +020096apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
97apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
98apic_set_irq(int apic_irq_delivered) "coalescing %d"
Blue Swirl97bf4852010-10-31 09:24:14 +000099
100# hw/cs4231.c
Lluís47f08d72011-08-31 20:31:58 +0200101cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
102cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
103cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
104cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
Blue Swirl97bf4852010-10-31 09:24:14 +0000105
Hervé Poussineaud43ed9e2011-07-18 23:34:21 +0200106# hw/ds1225y.c
Lluís47f08d72011-08-31 20:31:58 +0200107nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
108nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
Hervé Poussineaud43ed9e2011-07-18 23:34:21 +0200109
Blue Swirl97bf4852010-10-31 09:24:14 +0000110# hw/eccmemctl.c
Lluís47f08d72011-08-31 20:31:58 +0200111ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
112ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
113ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
114ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
115ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
116ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
117ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
118ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
119ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
120ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
121ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
122ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
123ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
124ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
125ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
126ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
127ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
128ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
Blue Swirl97bf4852010-10-31 09:24:14 +0000129
130# hw/lance.c
Lluís47f08d72011-08-31 20:31:58 +0200131lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
132lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
Blue Swirl97bf4852010-10-31 09:24:14 +0000133
134# hw/slavio_intctl.c
Lluís47f08d72011-08-31 20:31:58 +0200135slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x"
136slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x"
137slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
138slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x"
139slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x"
140slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x"
141slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x"
142slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x"
143slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d"
144slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x"
145slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d"
146slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
Blue Swirl97bf4852010-10-31 09:24:14 +0000147
148# hw/slavio_misc.c
Lluís47f08d72011-08-31 20:31:58 +0200149slavio_misc_update_irq_raise(void) "Raise IRQ"
150slavio_misc_update_irq_lower(void) "Lower IRQ"
151slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
152slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
153slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
154slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
155slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
156slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
157slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
158slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
159slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
160slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
161slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
162apc_mem_writeb(uint32_t val) "Write power management %02x"
163apc_mem_readb(uint32_t ret) "Read power management %02x"
164slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
165slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
166slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
167slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
Blue Swirl97bf4852010-10-31 09:24:14 +0000168
169# hw/slavio_timer.c
Lluís47f08d72011-08-31 20:31:58 +0200170slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
171slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
172slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64""
173slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
174slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
175slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64""
176slavio_timer_mem_writel_counter_invalid(void) "not user timer"
177slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
178slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
179slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
180slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
181slavio_timer_mem_writel_mode_invalid(void) "not system timer"
182slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64""
Blue Swirl97bf4852010-10-31 09:24:14 +0000183
184# hw/sparc32_dma.c
Lluís47f08d72011-08-31 20:31:58 +0200185ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64""
186ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64""
187sparc32_dma_set_irq_raise(void) "Raise IRQ"
188sparc32_dma_set_irq_lower(void) "Lower IRQ"
189espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
190espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
191sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
192sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
193sparc32_dma_enable_raise(void) "Raise DMA enable"
194sparc32_dma_enable_lower(void) "Lower DMA enable"
Blue Swirl97bf4852010-10-31 09:24:14 +0000195
196# hw/sun4m.c
Lluís47f08d72011-08-31 20:31:58 +0200197sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
198sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
199sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
200sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
Blue Swirl97bf4852010-10-31 09:24:14 +0000201
202# hw/sun4m_iommu.c
Lluís47f08d72011-08-31 20:31:58 +0200203sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
204sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
205sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64""
206sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
207sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
208sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
209sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
210sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64""
Stefan Hajnoczi94b0b5f2010-11-16 12:20:25 +0000211
Gerd Hoffmann891fb2c2011-09-01 13:56:37 +0200212# hw/usb-bus.c
213usb_port_claim(int bus, const char *port) "bus %d, port %s"
214usb_port_attach(int bus, const char *port) "bus %d, port %s"
215usb_port_detach(int bus, const char *port) "bus %d, port %s"
216usb_port_release(int bus, const char *port) "bus %d, port %s"
217
Gerd Hoffmann439a97c2011-05-18 10:12:58 +0200218# hw/usb-ehci.c
Lluís47f08d72011-08-31 20:31:58 +0200219usb_ehci_reset(void) "=== RESET ==="
220usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x"
221usb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x"
222usb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)"
223usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
224usb_ehci_state(const char *schedule, const char *state) "%s schedule %s"
225usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x"
226usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
227usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d"
228usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x"
229usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d"
230usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d"
231usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d"
Gerd Hoffmann2fe80192011-08-26 14:13:48 +0200232usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: next %08x - active %d"
Lluís47f08d72011-08-31 20:31:58 +0200233usb_ehci_port_attach(uint32_t port, const char *device) "attach port #%d - %s"
234usb_ehci_port_detach(uint32_t port) "detach port #%d"
235usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d"
236usb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, bufpos %d"
237usb_ehci_queue_action(void *q, const char *action) "q %p: %s"
Gerd Hoffmann439a97c2011-05-18 10:12:58 +0200238
Gerd Hoffmann37fb59d2010-11-17 11:03:53 +0100239# hw/usb-desc.c
Lluís47f08d72011-08-31 20:31:58 +0200240usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d"
241usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d"
242usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
243usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
244usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d"
245usb_set_addr(int addr) "dev %d"
246usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d"
247usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
248usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
Gerd Hoffmann37fb59d2010-11-17 11:03:53 +0100249
Gerd Hoffmanne6a2f502011-08-22 14:13:20 +0200250# usb-linux.c
251usb_host_open_started(int bus, int addr) "dev %d:%d"
252usb_host_open_success(int bus, int addr) "dev %d:%d"
253usb_host_open_failure(int bus, int addr) "dev %d:%d"
254usb_host_disconnect(int bus, int addr) "dev %d:%d"
255usb_host_close(int bus, int addr) "dev %d:%d"
256usb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d"
257usb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d"
258usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d"
259usb_host_claim_interfaces(int bus, int addr, int config, int nif) "dev %d:%d, config %d, nif %d"
260usb_host_release_interfaces(int bus, int addr) "dev %d:%d"
261usb_host_req_control(int bus, int addr, int req, int value, int index) "dev %d:%d, req 0x%x, value %d, index %d"
262usb_host_req_data(int bus, int addr, int in, int ep, int size) "dev %d:%d, in %d, ep %d, size %d"
263usb_host_req_complete(int bus, int addr, int status) "dev %d:%d, status %d"
264usb_host_urb_submit(int bus, int addr, void *aurb, int length, int more) "dev %d:%d, aurb %p, length %d, more %d"
265usb_host_urb_complete(int bus, int addr, void *aurb, int status, int length, int more) "dev %d:%d, aurb %p, status %d, length %d, more %d"
266usb_host_ep_set_halt(int bus, int addr, int ep) "dev %d:%d, ep %d"
267usb_host_ep_clear_halt(int bus, int addr, int ep) "dev %d:%d, ep %d"
268usb_host_ep_start_iso(int bus, int addr, int ep) "dev %d:%d, ep %d"
269usb_host_ep_stop_iso(int bus, int addr, int ep) "dev %d:%d, ep %d"
270usb_host_reset(int bus, int addr) "dev %d:%d"
271usb_host_auto_scan_enabled(void)
272usb_host_auto_scan_disabled(void)
Gerd Hoffmann9516bb42011-08-24 13:34:17 +0200273usb_host_claim_port(int bus, int hub, int port) "bus %d, hub addr %d, port %d"
Gerd Hoffmanne6a2f502011-08-22 14:13:20 +0200274
Paolo Bonzini5138efe2011-04-15 11:51:13 +0200275# hw/scsi-bus.c
Lluís47f08d72011-08-31 20:31:58 +0200276scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
277scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
278scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d"
279scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d"
280scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d"
281scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64""
282scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d"
283scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x"
284scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d"
285scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x"
286scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d"
287scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d"
Paolo Bonzini5138efe2011-04-15 11:51:13 +0200288
Stefan Hajnoczi94b0b5f2010-11-16 12:20:25 +0000289# vl.c
Lluís47f08d72011-08-31 20:31:58 +0200290vm_state_notify(int running, int reason) "running %d reason %d"
Stefan Hajnoczi298800c2010-12-06 16:08:01 +0000291
292# block/qed-l2-cache.c
Lluís47f08d72011-08-31 20:31:58 +0200293qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p"
294qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d"
295qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d"
Stefan Hajnoczi298800c2010-12-06 16:08:01 +0000296
297# block/qed-table.c
Lluís47f08d72011-08-31 20:31:58 +0200298qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p"
299qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d"
300qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u"
301qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d"
Stefan Hajnoczieabba582010-12-06 16:08:02 +0000302
303# block/qed.c
Lluís47f08d72011-08-31 20:31:58 +0200304qed_need_check_timer_cb(void *s) "s %p"
305qed_start_need_check_timer(void *s) "s %p"
306qed_cancel_need_check_timer(void *s) "s %p"
307qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d"
308qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p is_write %d"
309qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64""
310qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
311qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
312qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
313qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
314qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
Fabien Chouteau0f3a4a02011-01-24 12:56:52 +0100315
Hervé Poussineaub213b372011-08-26 21:20:11 +0200316# hw/g364fb.c
Lluís47f08d72011-08-31 20:31:58 +0200317g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
318g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
Hervé Poussineaub213b372011-08-26 21:20:11 +0200319
Fabien Chouteau0f3a4a02011-01-24 12:56:52 +0100320# hw/grlib_gptimer.c
Lluís47f08d72011-08-31 20:31:58 +0200321grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
322grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
323grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
324grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
325grlib_gptimer_hit(int id) "timer:%d HIT"
326grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
327grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
Fabien Chouteau3f10bcb2011-01-24 12:56:53 +0100328
329# hw/grlib_irqmp.c
Lluís47f08d72011-08-31 20:31:58 +0200330grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x\n"
331grlib_irqmp_ack(int intno) "interrupt:%d"
332grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
333grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64""
334grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
Fabien Chouteau8b1e1322011-01-24 12:56:54 +0100335
336# hw/grlib_apbuart.c
Lluís47f08d72011-08-31 20:31:58 +0200337grlib_apbuart_event(int event) "event:%d"
338grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
Fabien Chouteaub04d9892011-01-24 12:56:55 +0100339
340# hw/leon3.c
Lluís47f08d72011-08-31 20:31:58 +0200341leon3_set_irq(int intno) "Set CPU IRQ %d"
342leon3_reset_irq(int intno) "Reset CPU IRQ %d"
Anthony Liguori9363ee32011-02-01 15:22:48 -0600343
Alon Levycbcc6332011-01-19 10:49:50 +0200344# spice-qemu-char.c
Lluís47f08d72011-08-31 20:31:58 +0200345spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
346spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
347spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
348spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
Michael Walle4ef66fa2011-02-17 23:45:07 +0100349
350# hw/lm32_pic.c
Lluís47f08d72011-08-31 20:31:58 +0200351lm32_pic_raise_irq(void) "Raise CPU interrupt"
352lm32_pic_lower_irq(void) "Lower CPU interrupt"
353lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
354lm32_pic_set_im(uint32_t im) "im 0x%08x"
355lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
356lm32_pic_get_im(uint32_t im) "im 0x%08x"
357lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
Michael Walle15d7dc42011-02-17 23:45:08 +0100358
359# hw/lm32_juart.c
Lluís47f08d72011-08-31 20:31:58 +0200360lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
361lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
362lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
363lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
Michael Walleea7924d2011-02-17 23:45:10 +0100364
365# hw/lm32_timer.c
Lluís47f08d72011-08-31 20:31:58 +0200366lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
367lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
368lm32_timer_hit(void) "timer hit"
369lm32_timer_irq_state(int level) "irq state %d"
Michael Walle770ae572011-02-17 23:45:11 +0100370
371# hw/lm32_uart.c
Lluís47f08d72011-08-31 20:31:58 +0200372lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
373lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
374lm32_uart_irq_state(int level) "irq state %d"
Michael Wallef19410c2011-02-17 23:45:12 +0100375
376# hw/lm32_sys.c
Lluís47f08d72011-08-31 20:31:58 +0200377lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
Michael Walle25a8bb92011-03-07 23:32:32 +0100378
379# hw/milkymist-ac97.c
Lluís47f08d72011-08-31 20:31:58 +0200380milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
381milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
382milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
383milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply"
384milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write"
385milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read"
386milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u"
387milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
388milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
389milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
Michael Wallee4dc6d22011-03-07 23:32:33 +0100390
391# hw/milkymist-hpdmc.c
Lluís47f08d72011-08-31 20:31:58 +0200392milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
393milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
Michael Walleb4e37d92011-03-07 23:32:34 +0100394
395# hw/milkymist-memcard.c
Lluís47f08d72011-08-31 20:31:58 +0200396milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
397milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
Michael Walle07424542011-03-07 23:32:35 +0100398
Michael Walle57aa2652011-04-13 00:29:36 +0200399# hw/milkymist-minimac2.c
Lluís47f08d72011-08-31 20:31:58 +0200400milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
401milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
402milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
403milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
404milkymist_minimac2_tx_frame(uint32_t length) "length %u"
405milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u"
406milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p"
407milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d"
408milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
409milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
410milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
Michael Walle5ee18b92011-03-07 23:32:36 +0100411
412# hw/milkymist-pfpu.c
Lluís47f08d72011-08-31 20:31:58 +0200413milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
414milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
415milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
416milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
Michael Walle87a381e2011-03-07 23:32:37 +0100417
418# hw/milkymist-softusb.c
Lluís47f08d72011-08-31 20:31:58 +0200419milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
420milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
421milkymist_softusb_mevt(uint8_t m) "m %d"
422milkymist_softusb_kevt(uint8_t m) "m %d"
423milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x"
424milkymist_softusb_pulse_irq(void) "Pulse IRQ"
Michael Walle96832422011-03-07 23:32:38 +0100425
426# hw/milkymist-sysctl.c
Lluís47f08d72011-08-31 20:31:58 +0200427milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
428milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
429milkymist_sysctl_icap_write(uint32_t value) "value %08x"
430milkymist_sysctl_start_timer0(void) "Start timer0"
431milkymist_sysctl_stop_timer0(void) "Stop timer0"
432milkymist_sysctl_start_timer1(void) "Start timer1"
433milkymist_sysctl_stop_timer1(void) "Stop timer1"
434milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
435milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
Michael Walle0670dad2011-03-07 23:32:40 +0100436
437# hw/milkymist-tmu2.c
Lluís47f08d72011-08-31 20:31:58 +0200438milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
439milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
440milkymist_tmu2_start(void) "Start TMU"
441milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
Michael Walle883de162011-03-07 23:32:41 +0100442
443# hw/milkymist-uart.c
Lluís47f08d72011-08-31 20:31:58 +0200444milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
445milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
446milkymist_uart_pulse_irq_rx(void) "Pulse IRQ RX"
447milkymist_uart_pulse_irq_tx(void) "Pulse IRQ TX"
Michael Walled23948b2011-03-07 23:32:42 +0100448
449# hw/milkymist-vgafb.c
Lluís47f08d72011-08-31 20:31:58 +0200450milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
451milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
Jun Nakajima432d2682010-08-31 16:41:25 +0100452
Hervé Poussineau83818f72011-09-04 22:29:27 +0200453# hw/mipsnet.c
454mipsnet_send(uint32_t size) "sending len=%u"
455mipsnet_receive(uint32_t size) "receiving len=%u"
456mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x"
457mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64
458mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)"
459
Jun Nakajima432d2682010-08-31 16:41:25 +0100460# xen-all.c
Lluís47f08d72011-08-31 20:31:58 +0200461xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
462xen_client_set_memory(uint64_t start_addr, unsigned long size, unsigned long phys_offset, bool log_dirty) "%#"PRIx64" size %#lx, offset %#lx, log_dirty %i"
Jun Nakajima432d2682010-08-31 16:41:25 +0100463
464# xen-mapcache.c
Lluís47f08d72011-08-31 20:31:58 +0200465xen_map_cache(uint64_t phys_addr) "want %#"PRIx64""
466xen_remap_bucket(uint64_t index) "index %#"PRIx64""
467xen_map_cache_return(void* ptr) "%p"
468xen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64""
469xen_unmap_block(void* addr, unsigned long size) "%p, size %#lx"
Anthony PERARD050a0dd2010-09-16 13:57:49 +0100470
471# exec.c
Lluís47f08d72011-08-31 20:31:58 +0200472qemu_put_ram_ptr(void* addr) "%p"
Steven Smith01195b72011-06-16 17:05:17 +0100473
474# hw/xen_platform.c
Lluís47f08d72011-08-31 20:31:58 +0200475xen_platform_log(char *s) "xen platform: %s"
Kevin Wolf00dccaf2011-01-17 16:08:14 +0000476
477# qemu-coroutine.c
Lluís47f08d72011-08-31 20:31:58 +0200478qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p"
479qemu_coroutine_yield(void *from, void *to) "from %p to %p"
480qemu_coroutine_terminate(void *co) "self %p"
Kevin Wolfb96e9242011-06-30 17:56:46 +0200481
482# qemu-coroutine-lock.c
Lluís47f08d72011-08-31 20:31:58 +0200483qemu_co_queue_next_bh(void) ""
484qemu_co_queue_next(void *next) "next %p"
485qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p"
486qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
487qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
488qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
Blue Swirl30c2f232011-08-07 11:01:05 +0000489
490# hw/escc.c
Lluís47f08d72011-08-31 20:31:58 +0200491escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
492escc_get_queue(char channel, int val) "channel %c get 0x%02x"
493escc_update_irq(int irq) "IRQ = %d"
494escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d"
495escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x"
496escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d"
497escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x"
498escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d"
499escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d"
500escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x"
501escc_sunkbd_event_out(int ch) "Translated keycode %2.2x"
502escc_kbd_command(int val) "Command %d"
503escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x"