| Stefan Hajnoczi | 94a420b | 2010-05-22 17:52:39 +0100 | [diff] [blame] | 1 | # Trace events for debugging and performance instrumentation |
| 2 | # |
| 3 | # This file is processed by the tracetool script during the build. |
| 4 | # |
| 5 | # To add a new trace event: |
| 6 | # |
| 7 | # 1. Choose a name for the trace event. Declare its arguments and format |
| 8 | # string. |
| 9 | # |
| 10 | # 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() -> |
| 11 | # trace_multiwrite_cb(). The source file must #include "trace.h". |
| 12 | # |
| 13 | # Format of a trace event: |
| 14 | # |
| Stefan Hajnoczi | 1e2cf2b | 2010-05-24 11:32:09 +0100 | [diff] [blame] | 15 | # [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>" |
| Stefan Hajnoczi | 94a420b | 2010-05-22 17:52:39 +0100 | [diff] [blame] | 16 | # |
| Frediano Ziglio | a74cd8c | 2011-08-31 09:25:35 +0200 | [diff] [blame] | 17 | # Example: g_malloc(size_t size) "size %zu" |
| Stefan Hajnoczi | 94a420b | 2010-05-22 17:52:39 +0100 | [diff] [blame] | 18 | # |
| Stefan Hajnoczi | 1e2cf2b | 2010-05-24 11:32:09 +0100 | [diff] [blame] | 19 | # The "disable" keyword will build without the trace event. |
| Stefan Hajnoczi | 1e2cf2b | 2010-05-24 11:32:09 +0100 | [diff] [blame] | 20 | # |
| Stefan Hajnoczi | 94a420b | 2010-05-22 17:52:39 +0100 | [diff] [blame] | 21 | # The <name> must be a valid as a C function name. |
| 22 | # |
| 23 | # Types should be standard C types. Use void * for pointers because the trace |
| 24 | # system may not have the necessary headers included. |
| 25 | # |
| 26 | # The <format-string> should be a sprintf()-compatible format string. |
| Stefan Hajnoczi | cd245a1 | 2010-05-22 18:09:25 +0100 | [diff] [blame] | 27 | |
| 28 | # qemu-malloc.c |
| Frediano Ziglio | a74cd8c | 2011-08-31 09:25:35 +0200 | [diff] [blame] | 29 | g_malloc(size_t size, void *ptr) "size %zu ptr %p" |
| 30 | g_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p" |
| 31 | g_free(void *ptr) "ptr %p" |
| Stefan Hajnoczi | cd245a1 | 2010-05-22 18:09:25 +0100 | [diff] [blame] | 32 | |
| 33 | # osdep.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 34 | qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p" |
| 35 | qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p" |
| 36 | qemu_vfree(void *ptr) "ptr %p" |
| Stefan Hajnoczi | 6d519a5 | 2010-05-22 18:15:08 +0100 | [diff] [blame] | 37 | |
| Stefan Hajnoczi | 64979a4 | 2010-05-24 13:19:21 +0100 | [diff] [blame] | 38 | # hw/virtio.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 39 | virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u" |
| 40 | virtqueue_flush(void *vq, unsigned int count) "vq %p count %u" |
| 41 | virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u" |
| 42 | virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p" |
| 43 | virtio_irq(void *vq) "vq %p" |
| 44 | virtio_notify(void *vdev, void *vq) "vdev %p vq %p" |
| Stefan Hajnoczi | 64979a4 | 2010-05-24 13:19:21 +0100 | [diff] [blame] | 45 | |
| Amit Shah | 49e3fdd | 2011-07-05 16:36:39 +0530 | [diff] [blame] | 46 | # hw/virtio-serial-bus.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 47 | virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u" |
| 48 | virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d" |
| 49 | virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u" |
| 50 | virtio_serial_handle_control_message_port(unsigned int port) "port %u" |
| Amit Shah | 49e3fdd | 2011-07-05 16:36:39 +0530 | [diff] [blame] | 51 | |
| Amit Shah | d02e4fa | 2011-07-05 16:37:49 +0530 | [diff] [blame] | 52 | # hw/virtio-console.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 53 | virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd" |
| 54 | virtio_console_chr_read(unsigned int port, int size) "port %u, size %d" |
| 55 | virtio_console_chr_event(unsigned int port, int event) "port %u, event %d" |
| Amit Shah | d02e4fa | 2011-07-05 16:37:49 +0530 | [diff] [blame] | 56 | |
| Stefan Hajnoczi | 6d519a5 | 2010-05-22 18:15:08 +0100 | [diff] [blame] | 57 | # block.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 58 | multiwrite_cb(void *mcb, int ret) "mcb %p ret %d" |
| 59 | bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d" |
| 60 | bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p" |
| 61 | bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d" |
| 62 | bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p" |
| 63 | bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" |
| 64 | bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" |
| 65 | bdrv_set_locked(void *bs, int locked) "bs %p locked %d" |
| 66 | bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" |
| 67 | bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" |
| 68 | bdrv_co_io(int is_write, void *acb) "is_write %d acb %p" |
| Stefan Hajnoczi | 6d519a5 | 2010-05-22 18:15:08 +0100 | [diff] [blame] | 69 | |
| 70 | # hw/virtio-blk.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 71 | virtio_blk_req_complete(void *req, int status) "req %p status %d" |
| 72 | virtio_blk_rw_complete(void *req, int ret) "req %p ret %d" |
| 73 | virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" |
| Stefan Hajnoczi | 6d519a5 | 2010-05-22 18:15:08 +0100 | [diff] [blame] | 74 | |
| 75 | # posix-aio-compat.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 76 | paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d" |
| 77 | paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d" |
| 78 | paio_cancel(void *acb, void *opaque) "acb %p opaque %p" |
| Prerna Saxena | bd3c9aa | 2010-08-11 17:15:11 +0530 | [diff] [blame] | 79 | |
| 80 | # ioport.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 81 | cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u" |
| 82 | cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u" |
| Prerna Saxena | 62dd89d | 2010-08-11 17:16:03 +0530 | [diff] [blame] | 83 | |
| 84 | # balloon.c |
| 85 | # Since requests are raised via monitor, not many tracepoints are needed. |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 86 | balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" |
| Blue Swirl | d8023f3 | 2010-10-20 16:41:28 +0000 | [diff] [blame] | 87 | |
| 88 | # hw/apic.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 89 | apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" |
| 90 | apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d" |
| 91 | cpu_set_apic_base(uint64_t val) "%016"PRIx64"" |
| 92 | cpu_get_apic_base(uint64_t val) "%016"PRIx64"" |
| 93 | apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" |
| 94 | apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" |
| Blue Swirl | d8023f3 | 2010-10-20 16:41:28 +0000 | [diff] [blame] | 95 | # coalescing |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 96 | apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d" |
| 97 | apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d" |
| 98 | apic_set_irq(int apic_irq_delivered) "coalescing %d" |
| Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 99 | |
| 100 | # hw/cs4231.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 101 | cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" |
| 102 | cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" |
| 103 | cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" |
| 104 | cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" |
| Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 105 | |
| Hervé Poussineau | d43ed9e | 2011-07-18 23:34:21 +0200 | [diff] [blame] | 106 | # hw/ds1225y.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 107 | nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x" |
| 108 | nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x" |
| Hervé Poussineau | d43ed9e | 2011-07-18 23:34:21 +0200 | [diff] [blame] | 109 | |
| Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 110 | # hw/eccmemctl.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 111 | ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" |
| 112 | ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x" |
| 113 | ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x" |
| 114 | ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x" |
| 115 | ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x" |
| 116 | ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x" |
| 117 | ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x" |
| 118 | ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x" |
| 119 | ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x" |
| 120 | ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x" |
| 121 | ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x" |
| 122 | ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x" |
| 123 | ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x" |
| 124 | ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x" |
| 125 | ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x" |
| 126 | ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x" |
| 127 | ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x" |
| 128 | ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x" |
| Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 129 | |
| 130 | # hw/lance.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 131 | lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x" |
| 132 | lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x" |
| Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 133 | |
| 134 | # hw/slavio_intctl.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 135 | slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x" |
| 136 | slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x" |
| 137 | slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x" |
| 138 | slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x" |
| 139 | slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x" |
| 140 | slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x" |
| 141 | slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x" |
| 142 | slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x" |
| 143 | slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d" |
| 144 | slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x" |
| 145 | slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" |
| 146 | slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" |
| Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 147 | |
| 148 | # hw/slavio_misc.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 149 | slavio_misc_update_irq_raise(void) "Raise IRQ" |
| 150 | slavio_misc_update_irq_lower(void) "Lower IRQ" |
| 151 | slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" |
| 152 | slavio_cfg_mem_writeb(uint32_t val) "Write config %02x" |
| 153 | slavio_cfg_mem_readb(uint32_t ret) "Read config %02x" |
| 154 | slavio_diag_mem_writeb(uint32_t val) "Write diag %02x" |
| 155 | slavio_diag_mem_readb(uint32_t ret) "Read diag %02x" |
| 156 | slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x" |
| 157 | slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x" |
| 158 | slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x" |
| 159 | slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x" |
| 160 | slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x" |
| 161 | slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x" |
| 162 | apc_mem_writeb(uint32_t val) "Write power management %02x" |
| 163 | apc_mem_readb(uint32_t ret) "Read power management %02x" |
| 164 | slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x" |
| 165 | slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x" |
| 166 | slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x" |
| 167 | slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x" |
| Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 168 | |
| 169 | # hw/slavio_timer.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 170 | slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x" |
| 171 | slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x" |
| 172 | slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64"" |
| 173 | slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x" |
| 174 | slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x" |
| 175 | slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64"" |
| 176 | slavio_timer_mem_writel_counter_invalid(void) "not user timer" |
| 177 | slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started" |
| 178 | slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped" |
| 179 | slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer" |
| 180 | slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter" |
| 181 | slavio_timer_mem_writel_mode_invalid(void) "not system timer" |
| 182 | slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64"" |
| Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 183 | |
| 184 | # hw/sparc32_dma.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 185 | ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64"" |
| 186 | ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64"" |
| 187 | sparc32_dma_set_irq_raise(void) "Raise IRQ" |
| 188 | sparc32_dma_set_irq_lower(void) "Lower IRQ" |
| 189 | espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" |
| 190 | espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" |
| 191 | sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x" |
| 192 | sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x" |
| 193 | sparc32_dma_enable_raise(void) "Raise DMA enable" |
| 194 | sparc32_dma_enable_lower(void) "Lower DMA enable" |
| Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 195 | |
| 196 | # hw/sun4m.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 197 | sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" |
| 198 | sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" |
| 199 | sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" |
| 200 | sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" |
| Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 201 | |
| 202 | # hw/sun4m_iommu.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 203 | sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x" |
| 204 | sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x" |
| 205 | sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64"" |
| 206 | sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" |
| 207 | sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" |
| 208 | sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x" |
| 209 | sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" |
| 210 | sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64"" |
| Stefan Hajnoczi | 94b0b5f | 2010-11-16 12:20:25 +0000 | [diff] [blame] | 211 | |
| Gerd Hoffmann | 891fb2c | 2011-09-01 13:56:37 +0200 | [diff] [blame] | 212 | # hw/usb-bus.c |
| 213 | usb_port_claim(int bus, const char *port) "bus %d, port %s" |
| 214 | usb_port_attach(int bus, const char *port) "bus %d, port %s" |
| 215 | usb_port_detach(int bus, const char *port) "bus %d, port %s" |
| 216 | usb_port_release(int bus, const char *port) "bus %d, port %s" |
| 217 | |
| Gerd Hoffmann | 439a97c | 2011-05-18 10:12:58 +0200 | [diff] [blame] | 218 | # hw/usb-ehci.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 219 | usb_ehci_reset(void) "=== RESET ===" |
| 220 | usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x" |
| 221 | usb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x" |
| 222 | usb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)" |
| 223 | usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d" |
| 224 | usb_ehci_state(const char *schedule, const char *state) "%s schedule %s" |
| 225 | usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x" |
| 226 | usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d" |
| 227 | usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d" |
| 228 | usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x" |
| 229 | usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d" |
| 230 | usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d" |
| 231 | usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d" |
| Gerd Hoffmann | 2fe8019 | 2011-08-26 14:13:48 +0200 | [diff] [blame] | 232 | usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: next %08x - active %d" |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 233 | usb_ehci_port_attach(uint32_t port, const char *device) "attach port #%d - %s" |
| 234 | usb_ehci_port_detach(uint32_t port) "detach port #%d" |
| 235 | usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d" |
| 236 | usb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, bufpos %d" |
| 237 | usb_ehci_queue_action(void *q, const char *action) "q %p: %s" |
| Gerd Hoffmann | 439a97c | 2011-05-18 10:12:58 +0200 | [diff] [blame] | 238 | |
| Gerd Hoffmann | 37fb59d | 2010-11-17 11:03:53 +0100 | [diff] [blame] | 239 | # hw/usb-desc.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 240 | usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d" |
| 241 | usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d" |
| 242 | usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" |
| 243 | usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" |
| 244 | usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d" |
| 245 | usb_set_addr(int addr) "dev %d" |
| 246 | usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d" |
| 247 | usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" |
| 248 | usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" |
| Gerd Hoffmann | 37fb59d | 2010-11-17 11:03:53 +0100 | [diff] [blame] | 249 | |
| Gerd Hoffmann | e6a2f50 | 2011-08-22 14:13:20 +0200 | [diff] [blame] | 250 | # usb-linux.c |
| 251 | usb_host_open_started(int bus, int addr) "dev %d:%d" |
| 252 | usb_host_open_success(int bus, int addr) "dev %d:%d" |
| 253 | usb_host_open_failure(int bus, int addr) "dev %d:%d" |
| 254 | usb_host_disconnect(int bus, int addr) "dev %d:%d" |
| 255 | usb_host_close(int bus, int addr) "dev %d:%d" |
| 256 | usb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d" |
| 257 | usb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d" |
| 258 | usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d" |
| 259 | usb_host_claim_interfaces(int bus, int addr, int config, int nif) "dev %d:%d, config %d, nif %d" |
| 260 | usb_host_release_interfaces(int bus, int addr) "dev %d:%d" |
| 261 | usb_host_req_control(int bus, int addr, int req, int value, int index) "dev %d:%d, req 0x%x, value %d, index %d" |
| 262 | usb_host_req_data(int bus, int addr, int in, int ep, int size) "dev %d:%d, in %d, ep %d, size %d" |
| 263 | usb_host_req_complete(int bus, int addr, int status) "dev %d:%d, status %d" |
| 264 | usb_host_urb_submit(int bus, int addr, void *aurb, int length, int more) "dev %d:%d, aurb %p, length %d, more %d" |
| 265 | usb_host_urb_complete(int bus, int addr, void *aurb, int status, int length, int more) "dev %d:%d, aurb %p, status %d, length %d, more %d" |
| 266 | usb_host_ep_set_halt(int bus, int addr, int ep) "dev %d:%d, ep %d" |
| 267 | usb_host_ep_clear_halt(int bus, int addr, int ep) "dev %d:%d, ep %d" |
| 268 | usb_host_ep_start_iso(int bus, int addr, int ep) "dev %d:%d, ep %d" |
| 269 | usb_host_ep_stop_iso(int bus, int addr, int ep) "dev %d:%d, ep %d" |
| 270 | usb_host_reset(int bus, int addr) "dev %d:%d" |
| 271 | usb_host_auto_scan_enabled(void) |
| 272 | usb_host_auto_scan_disabled(void) |
| Gerd Hoffmann | 9516bb4 | 2011-08-24 13:34:17 +0200 | [diff] [blame] | 273 | usb_host_claim_port(int bus, int hub, int port) "bus %d, hub addr %d, port %d" |
| Gerd Hoffmann | e6a2f50 | 2011-08-22 14:13:20 +0200 | [diff] [blame] | 274 | |
| Paolo Bonzini | 5138efe | 2011-04-15 11:51:13 +0200 | [diff] [blame] | 275 | # hw/scsi-bus.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 276 | scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d" |
| 277 | scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" |
| 278 | scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d" |
| 279 | scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d" |
| 280 | scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d" |
| 281 | scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64"" |
| 282 | scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d" |
| 283 | scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x" |
| 284 | scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d" |
| 285 | scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x" |
| 286 | scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d" |
| 287 | scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d" |
| Paolo Bonzini | 5138efe | 2011-04-15 11:51:13 +0200 | [diff] [blame] | 288 | |
| Stefan Hajnoczi | 94b0b5f | 2010-11-16 12:20:25 +0000 | [diff] [blame] | 289 | # vl.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 290 | vm_state_notify(int running, int reason) "running %d reason %d" |
| Stefan Hajnoczi | 298800c | 2010-12-06 16:08:01 +0000 | [diff] [blame] | 291 | |
| 292 | # block/qed-l2-cache.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 293 | qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p" |
| 294 | qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d" |
| 295 | qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d" |
| Stefan Hajnoczi | 298800c | 2010-12-06 16:08:01 +0000 | [diff] [blame] | 296 | |
| 297 | # block/qed-table.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 298 | qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p" |
| 299 | qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d" |
| 300 | qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u" |
| 301 | qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d" |
| Stefan Hajnoczi | eabba58 | 2010-12-06 16:08:02 +0000 | [diff] [blame] | 302 | |
| 303 | # block/qed.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 304 | qed_need_check_timer_cb(void *s) "s %p" |
| 305 | qed_start_need_check_timer(void *s) "s %p" |
| 306 | qed_cancel_need_check_timer(void *s) "s %p" |
| 307 | qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d" |
| 308 | qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p is_write %d" |
| 309 | qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64"" |
| 310 | qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" |
| 311 | qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" |
| 312 | qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64"" |
| 313 | qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64"" |
| 314 | qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" |
| Fabien Chouteau | 0f3a4a0 | 2011-01-24 12:56:52 +0100 | [diff] [blame] | 315 | |
| Hervé Poussineau | b213b37 | 2011-08-26 21:20:11 +0200 | [diff] [blame] | 316 | # hw/g364fb.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 317 | g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x" |
| 318 | g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x" |
| Hervé Poussineau | b213b37 | 2011-08-26 21:20:11 +0200 | [diff] [blame] | 319 | |
| Fabien Chouteau | 0f3a4a0 | 2011-01-24 12:56:52 +0100 | [diff] [blame] | 320 | # hw/grlib_gptimer.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 321 | grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run" |
| 322 | grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x" |
| 323 | grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x" |
| 324 | grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x" |
| 325 | grlib_gptimer_hit(int id) "timer:%d HIT" |
| 326 | grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" |
| 327 | grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" |
| Fabien Chouteau | 3f10bcb | 2011-01-24 12:56:53 +0100 | [diff] [blame] | 328 | |
| 329 | # hw/grlib_irqmp.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 330 | grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x\n" |
| 331 | grlib_irqmp_ack(int intno) "interrupt:%d" |
| 332 | grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d" |
| 333 | grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64"" |
| 334 | grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" |
| Fabien Chouteau | 8b1e132 | 2011-01-24 12:56:54 +0100 | [diff] [blame] | 335 | |
| 336 | # hw/grlib_apbuart.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 337 | grlib_apbuart_event(int event) "event:%d" |
| 338 | grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" |
| Fabien Chouteau | b04d989 | 2011-01-24 12:56:55 +0100 | [diff] [blame] | 339 | |
| 340 | # hw/leon3.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 341 | leon3_set_irq(int intno) "Set CPU IRQ %d" |
| 342 | leon3_reset_irq(int intno) "Reset CPU IRQ %d" |
| Anthony Liguori | 9363ee3 | 2011-02-01 15:22:48 -0600 | [diff] [blame] | 343 | |
| Alon Levy | cbcc633 | 2011-01-19 10:49:50 +0200 | [diff] [blame] | 344 | # spice-qemu-char.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 345 | spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d" |
| 346 | spice_vmc_read(int bytes, int len) "spice read %d of requested %d" |
| 347 | spice_vmc_register_interface(void *scd) "spice vmc registered interface %p" |
| 348 | spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p" |
| Michael Walle | 4ef66fa | 2011-02-17 23:45:07 +0100 | [diff] [blame] | 349 | |
| 350 | # hw/lm32_pic.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 351 | lm32_pic_raise_irq(void) "Raise CPU interrupt" |
| 352 | lm32_pic_lower_irq(void) "Lower CPU interrupt" |
| 353 | lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d" |
| 354 | lm32_pic_set_im(uint32_t im) "im 0x%08x" |
| 355 | lm32_pic_set_ip(uint32_t ip) "ip 0x%08x" |
| 356 | lm32_pic_get_im(uint32_t im) "im 0x%08x" |
| 357 | lm32_pic_get_ip(uint32_t ip) "ip 0x%08x" |
| Michael Walle | 15d7dc4 | 2011-02-17 23:45:08 +0100 | [diff] [blame] | 358 | |
| 359 | # hw/lm32_juart.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 360 | lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x" |
| 361 | lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x" |
| 362 | lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x" |
| 363 | lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x" |
| Michael Walle | ea7924d | 2011-02-17 23:45:10 +0100 | [diff] [blame] | 364 | |
| 365 | # hw/lm32_timer.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 366 | lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
| 367 | lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
| 368 | lm32_timer_hit(void) "timer hit" |
| 369 | lm32_timer_irq_state(int level) "irq state %d" |
| Michael Walle | 770ae57 | 2011-02-17 23:45:11 +0100 | [diff] [blame] | 370 | |
| 371 | # hw/lm32_uart.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 372 | lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
| 373 | lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
| 374 | lm32_uart_irq_state(int level) "irq state %d" |
| Michael Walle | f19410c | 2011-02-17 23:45:12 +0100 | [diff] [blame] | 375 | |
| 376 | # hw/lm32_sys.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 377 | lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
| Michael Walle | 25a8bb9 | 2011-03-07 23:32:32 +0100 | [diff] [blame] | 378 | |
| 379 | # hw/milkymist-ac97.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 380 | milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 381 | milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 382 | milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request" |
| 383 | milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply" |
| 384 | milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write" |
| 385 | milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read" |
| 386 | milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u" |
| 387 | milkymist_ac97_in_cb_transferred(int transferred) "transferred %d" |
| 388 | milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u" |
| 389 | milkymist_ac97_out_cb_transferred(int transferred) "transferred %d" |
| Michael Walle | e4dc6d2 | 2011-03-07 23:32:33 +0100 | [diff] [blame] | 390 | |
| 391 | # hw/milkymist-hpdmc.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 392 | milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x" |
| 393 | milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x" |
| Michael Walle | b4e37d9 | 2011-03-07 23:32:34 +0100 | [diff] [blame] | 394 | |
| 395 | # hw/milkymist-memcard.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 396 | milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 397 | milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| Michael Walle | 0742454 | 2011-03-07 23:32:35 +0100 | [diff] [blame] | 398 | |
| Michael Walle | 57aa265 | 2011-04-13 00:29:36 +0200 | [diff] [blame] | 399 | # hw/milkymist-minimac2.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 400 | milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 401 | milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 402 | milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" |
| 403 | milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" |
| 404 | milkymist_minimac2_tx_frame(uint32_t length) "length %u" |
| 405 | milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u" |
| 406 | milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p" |
| 407 | milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d" |
| 408 | milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX" |
| 409 | milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX" |
| 410 | milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX" |
| Michael Walle | 5ee18b9 | 2011-03-07 23:32:36 +0100 | [diff] [blame] | 411 | |
| 412 | # hw/milkymist-pfpu.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 413 | milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 414 | milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 415 | milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x" |
| 416 | milkymist_pfpu_pulse_irq(void) "Pulse IRQ" |
| Michael Walle | 87a381e | 2011-03-07 23:32:37 +0100 | [diff] [blame] | 417 | |
| 418 | # hw/milkymist-softusb.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 419 | milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 420 | milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 421 | milkymist_softusb_mevt(uint8_t m) "m %d" |
| 422 | milkymist_softusb_kevt(uint8_t m) "m %d" |
| 423 | milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x" |
| 424 | milkymist_softusb_pulse_irq(void) "Pulse IRQ" |
| Michael Walle | 9683242 | 2011-03-07 23:32:38 +0100 | [diff] [blame] | 425 | |
| 426 | # hw/milkymist-sysctl.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 427 | milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 428 | milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 429 | milkymist_sysctl_icap_write(uint32_t value) "value %08x" |
| 430 | milkymist_sysctl_start_timer0(void) "Start timer0" |
| 431 | milkymist_sysctl_stop_timer0(void) "Stop timer0" |
| 432 | milkymist_sysctl_start_timer1(void) "Start timer1" |
| 433 | milkymist_sysctl_stop_timer1(void) "Stop timer1" |
| 434 | milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0" |
| 435 | milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1" |
| Michael Walle | 0670dad | 2011-03-07 23:32:40 +0100 | [diff] [blame] | 436 | |
| 437 | # hw/milkymist-tmu2.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 438 | milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 439 | milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 440 | milkymist_tmu2_start(void) "Start TMU" |
| 441 | milkymist_tmu2_pulse_irq(void) "Pulse IRQ" |
| Michael Walle | 883de16 | 2011-03-07 23:32:41 +0100 | [diff] [blame] | 442 | |
| 443 | # hw/milkymist-uart.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 444 | milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 445 | milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 446 | milkymist_uart_pulse_irq_rx(void) "Pulse IRQ RX" |
| 447 | milkymist_uart_pulse_irq_tx(void) "Pulse IRQ TX" |
| Michael Walle | d23948b | 2011-03-07 23:32:42 +0100 | [diff] [blame] | 448 | |
| 449 | # hw/milkymist-vgafb.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 450 | milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 451 | milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 452 | |
| Hervé Poussineau | 83818f7 | 2011-09-04 22:29:27 +0200 | [diff] [blame^] | 453 | # hw/mipsnet.c |
| 454 | mipsnet_send(uint32_t size) "sending len=%u" |
| 455 | mipsnet_receive(uint32_t size) "receiving len=%u" |
| 456 | mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x" |
| 457 | mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 |
| 458 | mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)" |
| 459 | |
| Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 460 | # xen-all.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 461 | xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx" |
| 462 | xen_client_set_memory(uint64_t start_addr, unsigned long size, unsigned long phys_offset, bool log_dirty) "%#"PRIx64" size %#lx, offset %#lx, log_dirty %i" |
| Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 463 | |
| 464 | # xen-mapcache.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 465 | xen_map_cache(uint64_t phys_addr) "want %#"PRIx64"" |
| 466 | xen_remap_bucket(uint64_t index) "index %#"PRIx64"" |
| 467 | xen_map_cache_return(void* ptr) "%p" |
| 468 | xen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64"" |
| 469 | xen_unmap_block(void* addr, unsigned long size) "%p, size %#lx" |
| Anthony PERARD | 050a0dd | 2010-09-16 13:57:49 +0100 | [diff] [blame] | 470 | |
| 471 | # exec.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 472 | qemu_put_ram_ptr(void* addr) "%p" |
| Steven Smith | 01195b7 | 2011-06-16 17:05:17 +0100 | [diff] [blame] | 473 | |
| 474 | # hw/xen_platform.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 475 | xen_platform_log(char *s) "xen platform: %s" |
| Kevin Wolf | 00dccaf | 2011-01-17 16:08:14 +0000 | [diff] [blame] | 476 | |
| 477 | # qemu-coroutine.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 478 | qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p" |
| 479 | qemu_coroutine_yield(void *from, void *to) "from %p to %p" |
| 480 | qemu_coroutine_terminate(void *co) "self %p" |
| Kevin Wolf | b96e924 | 2011-06-30 17:56:46 +0200 | [diff] [blame] | 481 | |
| 482 | # qemu-coroutine-lock.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 483 | qemu_co_queue_next_bh(void) "" |
| 484 | qemu_co_queue_next(void *next) "next %p" |
| 485 | qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p" |
| 486 | qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p" |
| 487 | qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p" |
| 488 | qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p" |
| Blue Swirl | 30c2f23 | 2011-08-07 11:01:05 +0000 | [diff] [blame] | 489 | |
| 490 | # hw/escc.c |
| Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 491 | escc_put_queue(char channel, int b) "channel %c put: 0x%02x" |
| 492 | escc_get_queue(char channel, int val) "channel %c get 0x%02x" |
| 493 | escc_update_irq(int irq) "IRQ = %d" |
| 494 | escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d" |
| 495 | escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x" |
| 496 | escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d" |
| 497 | escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x" |
| 498 | escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d" |
| 499 | escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d" |
| 500 | escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x" |
| 501 | escc_sunkbd_event_out(int ch) "Translated keycode %2.2x" |
| 502 | escc_kbd_command(int val) "Command %d" |
| 503 | escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x" |
