bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Software MMU support |
| 3 | * |
| 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
| 17 | * License along with this library; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | */ |
| 20 | #define DATA_SIZE (1 << SHIFT) |
| 21 | |
| 22 | #if DATA_SIZE == 8 |
| 23 | #define SUFFIX q |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 24 | #define USUFFIX q |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 25 | #define DATA_TYPE uint64_t |
| 26 | #elif DATA_SIZE == 4 |
| 27 | #define SUFFIX l |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 28 | #define USUFFIX l |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 29 | #define DATA_TYPE uint32_t |
| 30 | #elif DATA_SIZE == 2 |
| 31 | #define SUFFIX w |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 32 | #define USUFFIX uw |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 33 | #define DATA_TYPE uint16_t |
| 34 | #elif DATA_SIZE == 1 |
| 35 | #define SUFFIX b |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 36 | #define USUFFIX ub |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 37 | #define DATA_TYPE uint8_t |
| 38 | #else |
| 39 | #error unsupported data size |
| 40 | #endif |
| 41 | |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 42 | #ifdef SOFTMMU_CODE_ACCESS |
| 43 | #define READ_ACCESS_TYPE 2 |
| 44 | #else |
| 45 | #define READ_ACCESS_TYPE 0 |
| 46 | #endif |
| 47 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 48 | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 49 | int is_user, |
| 50 | void *retaddr); |
bellard | 108c49b | 2005-07-24 12:55:09 +0000 | [diff] [blame] | 51 | static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr, |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 52 | target_ulong tlb_addr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 53 | { |
| 54 | DATA_TYPE res; |
| 55 | int index; |
| 56 | |
| 57 | index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); |
| 58 | #if SHIFT <= 2 |
bellard | a4193c8 | 2004-06-03 14:01:43 +0000 | [diff] [blame] | 59 | res = io_mem_read[index][SHIFT](io_mem_opaque[index], physaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 60 | #else |
| 61 | #ifdef TARGET_WORDS_BIGENDIAN |
bellard | a4193c8 | 2004-06-03 14:01:43 +0000 | [diff] [blame] | 62 | res = (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr) << 32; |
| 63 | res |= io_mem_read[index][2](io_mem_opaque[index], physaddr + 4); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 64 | #else |
bellard | a4193c8 | 2004-06-03 14:01:43 +0000 | [diff] [blame] | 65 | res = io_mem_read[index][2](io_mem_opaque[index], physaddr); |
| 66 | res |= (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr + 4) << 32; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 67 | #endif |
| 68 | #endif /* SHIFT > 2 */ |
| 69 | return res; |
| 70 | } |
| 71 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 72 | /* handle all cases except unaligned access which span two pages */ |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 73 | DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 74 | int is_user) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 75 | { |
| 76 | DATA_TYPE res; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 77 | int index; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 78 | target_ulong tlb_addr; |
bellard | 108c49b | 2005-07-24 12:55:09 +0000 | [diff] [blame] | 79 | target_phys_addr_t physaddr; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 80 | void *retaddr; |
| 81 | |
| 82 | /* test if there is match for unaligned or IO access */ |
| 83 | /* XXX: could done more in memory macro in a non portable way */ |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 84 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 85 | redo: |
| 86 | tlb_addr = env->tlb_read[is_user][index].address; |
| 87 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
| 88 | physaddr = addr + env->tlb_read[is_user][index].addend; |
| 89 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 90 | /* IO access */ |
| 91 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 92 | goto do_unaligned_access; |
| 93 | res = glue(io_read, SUFFIX)(physaddr, tlb_addr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame^] | 94 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 95 | /* slow unaligned access (it spans two pages or IO) */ |
| 96 | do_unaligned_access: |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 97 | retaddr = GETPC(); |
| 98 | res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr, |
| 99 | is_user, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 100 | } else { |
| 101 | /* unaligned access in the same page */ |
bellard | 108c49b | 2005-07-24 12:55:09 +0000 | [diff] [blame] | 102 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)physaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 103 | } |
| 104 | } else { |
| 105 | /* the page is not in the TLB : fill it */ |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 106 | retaddr = GETPC(); |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 107 | tlb_fill(addr, READ_ACCESS_TYPE, is_user, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 108 | goto redo; |
| 109 | } |
| 110 | return res; |
| 111 | } |
| 112 | |
| 113 | /* handle all unaligned cases */ |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 114 | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 115 | int is_user, |
| 116 | void *retaddr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 117 | { |
| 118 | DATA_TYPE res, res1, res2; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 119 | int index, shift; |
bellard | 108c49b | 2005-07-24 12:55:09 +0000 | [diff] [blame] | 120 | target_phys_addr_t physaddr; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 121 | target_ulong tlb_addr, addr1, addr2; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 122 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 123 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 124 | redo: |
| 125 | tlb_addr = env->tlb_read[is_user][index].address; |
| 126 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
| 127 | physaddr = addr + env->tlb_read[is_user][index].addend; |
| 128 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 129 | /* IO access */ |
| 130 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 131 | goto do_unaligned_access; |
| 132 | res = glue(io_read, SUFFIX)(physaddr, tlb_addr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame^] | 133 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 134 | do_unaligned_access: |
| 135 | /* slow unaligned access (it spans two pages) */ |
| 136 | addr1 = addr & ~(DATA_SIZE - 1); |
| 137 | addr2 = addr1 + DATA_SIZE; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 138 | res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1, |
| 139 | is_user, retaddr); |
| 140 | res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2, |
| 141 | is_user, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 142 | shift = (addr & (DATA_SIZE - 1)) * 8; |
| 143 | #ifdef TARGET_WORDS_BIGENDIAN |
| 144 | res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift)); |
| 145 | #else |
| 146 | res = (res1 >> shift) | (res2 << ((DATA_SIZE * 8) - shift)); |
| 147 | #endif |
bellard | 6986f88 | 2004-01-18 21:53:18 +0000 | [diff] [blame] | 148 | res = (DATA_TYPE)res; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 149 | } else { |
| 150 | /* unaligned/aligned access in the same page */ |
bellard | 108c49b | 2005-07-24 12:55:09 +0000 | [diff] [blame] | 151 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)physaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 152 | } |
| 153 | } else { |
| 154 | /* the page is not in the TLB : fill it */ |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 155 | tlb_fill(addr, READ_ACCESS_TYPE, is_user, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 156 | goto redo; |
| 157 | } |
| 158 | return res; |
| 159 | } |
| 160 | |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 161 | #ifndef SOFTMMU_CODE_ACCESS |
| 162 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 163 | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 164 | DATA_TYPE val, |
| 165 | int is_user, |
| 166 | void *retaddr); |
| 167 | |
bellard | 108c49b | 2005-07-24 12:55:09 +0000 | [diff] [blame] | 168 | static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr, |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 169 | DATA_TYPE val, |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 170 | target_ulong tlb_addr, |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 171 | void *retaddr) |
| 172 | { |
| 173 | int index; |
| 174 | |
| 175 | index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); |
| 176 | env->mem_write_vaddr = tlb_addr; |
| 177 | env->mem_write_pc = (unsigned long)retaddr; |
| 178 | #if SHIFT <= 2 |
| 179 | io_mem_write[index][SHIFT](io_mem_opaque[index], physaddr, val); |
| 180 | #else |
| 181 | #ifdef TARGET_WORDS_BIGENDIAN |
| 182 | io_mem_write[index][2](io_mem_opaque[index], physaddr, val >> 32); |
| 183 | io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val); |
| 184 | #else |
| 185 | io_mem_write[index][2](io_mem_opaque[index], physaddr, val); |
| 186 | io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val >> 32); |
| 187 | #endif |
| 188 | #endif /* SHIFT > 2 */ |
| 189 | } |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 190 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 191 | void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 192 | DATA_TYPE val, |
| 193 | int is_user) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 194 | { |
bellard | 108c49b | 2005-07-24 12:55:09 +0000 | [diff] [blame] | 195 | target_phys_addr_t physaddr; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 196 | target_ulong tlb_addr; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 197 | void *retaddr; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 198 | int index; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 199 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 200 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 201 | redo: |
| 202 | tlb_addr = env->tlb_write[is_user][index].address; |
| 203 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | 4ad06a2 | 2003-11-09 16:58:12 +0000 | [diff] [blame] | 204 | physaddr = addr + env->tlb_write[is_user][index].addend; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 205 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 206 | /* IO access */ |
| 207 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 208 | goto do_unaligned_access; |
bellard | d720b93 | 2004-04-25 17:57:43 +0000 | [diff] [blame] | 209 | retaddr = GETPC(); |
| 210 | glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame^] | 211 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 212 | do_unaligned_access: |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 213 | retaddr = GETPC(); |
| 214 | glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val, |
| 215 | is_user, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 216 | } else { |
| 217 | /* aligned/unaligned access in the same page */ |
bellard | 108c49b | 2005-07-24 12:55:09 +0000 | [diff] [blame] | 218 | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)physaddr, val); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 219 | } |
| 220 | } else { |
| 221 | /* the page is not in the TLB : fill it */ |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 222 | retaddr = GETPC(); |
| 223 | tlb_fill(addr, 1, is_user, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 224 | goto redo; |
| 225 | } |
| 226 | } |
| 227 | |
| 228 | /* handles all unaligned cases */ |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 229 | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 230 | DATA_TYPE val, |
| 231 | int is_user, |
| 232 | void *retaddr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 233 | { |
bellard | 108c49b | 2005-07-24 12:55:09 +0000 | [diff] [blame] | 234 | target_phys_addr_t physaddr; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 235 | target_ulong tlb_addr; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 236 | int index, i; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 237 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 238 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 239 | redo: |
| 240 | tlb_addr = env->tlb_write[is_user][index].address; |
| 241 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | 4ad06a2 | 2003-11-09 16:58:12 +0000 | [diff] [blame] | 242 | physaddr = addr + env->tlb_write[is_user][index].addend; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 243 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 244 | /* IO access */ |
| 245 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 246 | goto do_unaligned_access; |
bellard | d720b93 | 2004-04-25 17:57:43 +0000 | [diff] [blame] | 247 | glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame^] | 248 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 249 | do_unaligned_access: |
| 250 | /* XXX: not efficient, but simple */ |
| 251 | for(i = 0;i < DATA_SIZE; i++) { |
| 252 | #ifdef TARGET_WORDS_BIGENDIAN |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 253 | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)), |
| 254 | is_user, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 255 | #else |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 256 | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8), |
| 257 | is_user, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 258 | #endif |
| 259 | } |
| 260 | } else { |
| 261 | /* aligned/unaligned access in the same page */ |
bellard | 108c49b | 2005-07-24 12:55:09 +0000 | [diff] [blame] | 262 | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)physaddr, val); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 263 | } |
| 264 | } else { |
| 265 | /* the page is not in the TLB : fill it */ |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 266 | tlb_fill(addr, 1, is_user, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 267 | goto redo; |
| 268 | } |
| 269 | } |
| 270 | |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 271 | #endif /* !defined(SOFTMMU_CODE_ACCESS) */ |
| 272 | |
| 273 | #undef READ_ACCESS_TYPE |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 274 | #undef SHIFT |
| 275 | #undef DATA_TYPE |
| 276 | #undef SUFFIX |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 277 | #undef USUFFIX |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 278 | #undef DATA_SIZE |