blob: 83fd91714af34ed9295982a44e8f117d43e02d16 [file] [log] [blame]
pbrook0ff596d2007-05-23 00:03:59 +00001#ifndef QEMU_I2C_H
2#define QEMU_I2C_H
3
Paul Brookfe8de492009-05-14 22:35:08 +01004#include "qdev.h"
5
pbrook0ff596d2007-05-23 00:03:59 +00006/* The QEMU I2C implementation only supports simple transfers that complete
7 immediately. It does not support slave devices that need to be able to
8 defer their response (eg. CPU slave interfaces where the data is supplied
9 by the device driver in response to an interrupt). */
10
11enum i2c_event {
12 I2C_START_RECV,
13 I2C_START_SEND,
14 I2C_FINISH,
thsaa1f17c2007-07-11 22:48:58 +000015 I2C_NACK /* Masker NACKed a receive byte. */
pbrook0ff596d2007-05-23 00:03:59 +000016};
17
pbrook0ff596d2007-05-23 00:03:59 +000018/* Master to slave. */
19typedef int (*i2c_send_cb)(i2c_slave *s, uint8_t data);
20/* Slave to master. */
21typedef int (*i2c_recv_cb)(i2c_slave *s);
22/* Notify the slave of a bus state change. */
23typedef void (*i2c_event_cb)(i2c_slave *s, enum i2c_event event);
24
Gerd Hoffmann81a322d2009-08-14 10:36:05 +020025typedef int (*i2c_slave_initfn)(i2c_slave *dev);
Paul Brookfe8de492009-05-14 22:35:08 +010026
27typedef struct {
Paul Brook02e2da42009-05-23 00:05:19 +010028 DeviceInfo qdev;
29
Paul Brookfe8de492009-05-14 22:35:08 +010030 /* Callbacks provided by the device. */
31 i2c_slave_initfn init;
32 i2c_event_cb event;
33 i2c_recv_cb recv;
34 i2c_send_cb send;
35} I2CSlaveInfo;
36
pbrook0ff596d2007-05-23 00:03:59 +000037struct i2c_slave
38{
Paul Brookfe8de492009-05-14 22:35:08 +010039 DeviceState qdev;
40 I2CSlaveInfo *info;
pbrook0ff596d2007-05-23 00:03:59 +000041
42 /* Remaining fields for internal use by the I2C code. */
Juan Quintela5b7f5322009-09-29 22:48:26 +020043 uint8_t address;
pbrook0ff596d2007-05-23 00:03:59 +000044};
45
Paul Brook02e2da42009-05-23 00:05:19 +010046i2c_bus *i2c_init_bus(DeviceState *parent, const char *name);
Juan Quintela5b7f5322009-09-29 22:48:26 +020047void i2c_set_slave_address(i2c_slave *dev, uint8_t address);
pbrook0ff596d2007-05-23 00:03:59 +000048int i2c_bus_busy(i2c_bus *bus);
Juan Quintela5b7f5322009-09-29 22:48:26 +020049int i2c_start_transfer(i2c_bus *bus, uint8_t address, int recv);
pbrook0ff596d2007-05-23 00:03:59 +000050void i2c_end_transfer(i2c_bus *bus);
51void i2c_nack(i2c_bus *bus);
52int i2c_send(i2c_bus *bus, uint8_t data);
53int i2c_recv(i2c_bus *bus);
54
Paul Brookfe8de492009-05-14 22:35:08 +010055#define I2C_SLAVE_FROM_QDEV(dev) DO_UPCAST(i2c_slave, qdev, dev)
56#define FROM_I2C_SLAVE(type, dev) DO_UPCAST(type, i2c, dev)
57
Gerd Hoffmann074f2ff2009-06-10 09:41:42 +020058void i2c_register_slave(I2CSlaveInfo *type);
Paul Brookfe8de492009-05-14 22:35:08 +010059
Juan Quintela5b7f5322009-09-29 22:48:26 +020060DeviceState *i2c_create_slave(i2c_bus *bus, const char *name, uint8_t addr);
Paul Brookfe8de492009-05-14 22:35:08 +010061
balrogadb86c32007-05-23 22:04:23 +000062/* max7310.c */
balrogadb86c32007-05-23 22:04:23 +000063void max7310_reset(i2c_slave *i2c);
64qemu_irq *max7310_gpio_in_get(i2c_slave *i2c);
65void max7310_gpio_out_set(i2c_slave *i2c, int line, qemu_irq handler);
66
67/* wm8750.c */
Paul Brookcdbe40c2009-05-14 22:35:08 +010068void wm8750_data_req_set(DeviceState *dev,
balrogadb86c32007-05-23 22:04:23 +000069 void (*data_req)(void *, int, int), void *opaque);
70void wm8750_dac_dat(void *opaque, uint32_t sample);
71uint32_t wm8750_adc_dat(void *opaque);
balrog662caa62008-04-26 12:00:18 +000072void *wm8750_dac_buffer(void *opaque, int samples);
73void wm8750_dac_commit(void *opaque);
balrogb0f74c82008-11-12 17:36:08 +000074void wm8750_set_bclk_in(void *opaque, int new_hz);
balrogadb86c32007-05-23 22:04:23 +000075
balrog7e7c5e42008-04-14 21:57:44 +000076/* tmp105.c */
balrog7e7c5e42008-04-14 21:57:44 +000077void tmp105_set(i2c_slave *i2c, int temp);
78
balrog1d4e5472008-05-09 22:16:11 +000079/* lm832x.c */
Paul Brook2d9401a2009-05-14 22:35:08 +010080void lm832x_key_event(i2c_slave *i2c, int key, int state);
balrog1d4e5472008-05-09 22:16:11 +000081
pbrook0ff596d2007-05-23 00:03:59 +000082#endif