Stefan Hajnoczi | 94a420b | 2010-05-22 17:52:39 +0100 | [diff] [blame] | 1 | # Trace events for debugging and performance instrumentation |
| 2 | # |
| 3 | # This file is processed by the tracetool script during the build. |
| 4 | # |
| 5 | # To add a new trace event: |
| 6 | # |
| 7 | # 1. Choose a name for the trace event. Declare its arguments and format |
| 8 | # string. |
| 9 | # |
| 10 | # 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() -> |
| 11 | # trace_multiwrite_cb(). The source file must #include "trace.h". |
| 12 | # |
| 13 | # Format of a trace event: |
| 14 | # |
Stefan Hajnoczi | 1e2cf2b | 2010-05-24 11:32:09 +0100 | [diff] [blame] | 15 | # [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>" |
Stefan Hajnoczi | 94a420b | 2010-05-22 17:52:39 +0100 | [diff] [blame] | 16 | # |
Frediano Ziglio | a74cd8c | 2011-08-31 09:25:35 +0200 | [diff] [blame] | 17 | # Example: g_malloc(size_t size) "size %zu" |
Stefan Hajnoczi | 94a420b | 2010-05-22 17:52:39 +0100 | [diff] [blame] | 18 | # |
Stefan Hajnoczi | 1e2cf2b | 2010-05-24 11:32:09 +0100 | [diff] [blame] | 19 | # The "disable" keyword will build without the trace event. |
Stefan Hajnoczi | 1e2cf2b | 2010-05-24 11:32:09 +0100 | [diff] [blame] | 20 | # |
Stefan Hajnoczi | 94a420b | 2010-05-22 17:52:39 +0100 | [diff] [blame] | 21 | # The <name> must be a valid as a C function name. |
| 22 | # |
| 23 | # Types should be standard C types. Use void * for pointers because the trace |
| 24 | # system may not have the necessary headers included. |
| 25 | # |
| 26 | # The <format-string> should be a sprintf()-compatible format string. |
Stefan Hajnoczi | cd245a1 | 2010-05-22 18:09:25 +0100 | [diff] [blame] | 27 | |
| 28 | # qemu-malloc.c |
Frediano Ziglio | a74cd8c | 2011-08-31 09:25:35 +0200 | [diff] [blame] | 29 | g_malloc(size_t size, void *ptr) "size %zu ptr %p" |
| 30 | g_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p" |
| 31 | g_free(void *ptr) "ptr %p" |
Stefan Hajnoczi | cd245a1 | 2010-05-22 18:09:25 +0100 | [diff] [blame] | 32 | |
| 33 | # osdep.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 34 | qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p" |
| 35 | qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p" |
| 36 | qemu_vfree(void *ptr) "ptr %p" |
Stefan Hajnoczi | 6d519a5 | 2010-05-22 18:15:08 +0100 | [diff] [blame] | 37 | |
Stefan Hajnoczi | 64979a4 | 2010-05-24 13:19:21 +0100 | [diff] [blame] | 38 | # hw/virtio.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 39 | virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u" |
| 40 | virtqueue_flush(void *vq, unsigned int count) "vq %p count %u" |
| 41 | virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u" |
| 42 | virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p" |
| 43 | virtio_irq(void *vq) "vq %p" |
| 44 | virtio_notify(void *vdev, void *vq) "vdev %p vq %p" |
Stefan Hajnoczi | 4e1837f | 2011-09-13 13:34:37 +0100 | [diff] [blame] | 45 | virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u" |
Stefan Hajnoczi | 64979a4 | 2010-05-24 13:19:21 +0100 | [diff] [blame] | 46 | |
Amit Shah | 49e3fdd | 2011-07-05 16:36:39 +0530 | [diff] [blame] | 47 | # hw/virtio-serial-bus.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 48 | virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u" |
| 49 | virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d" |
| 50 | virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u" |
| 51 | virtio_serial_handle_control_message_port(unsigned int port) "port %u" |
Amit Shah | 49e3fdd | 2011-07-05 16:36:39 +0530 | [diff] [blame] | 52 | |
Amit Shah | d02e4fa | 2011-07-05 16:37:49 +0530 | [diff] [blame] | 53 | # hw/virtio-console.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 54 | virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd" |
| 55 | virtio_console_chr_read(unsigned int port, int size) "port %u, size %d" |
| 56 | virtio_console_chr_event(unsigned int port, int event) "port %u, event %d" |
Amit Shah | d02e4fa | 2011-07-05 16:37:49 +0530 | [diff] [blame] | 57 | |
Stefan Hajnoczi | 6d519a5 | 2010-05-22 18:15:08 +0100 | [diff] [blame] | 58 | # block.c |
Stefan Hajnoczi | 28dcee1 | 2011-09-22 20:14:12 +0100 | [diff] [blame] | 59 | bdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) "bs %p filename \"%s\" flags %#x format_name \"%s\"" |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 60 | multiwrite_cb(void *mcb, int ret) "mcb %p ret %d" |
| 61 | bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d" |
Paolo Bonzini | 4265d62 | 2011-10-17 12:32:14 +0200 | [diff] [blame] | 62 | bdrv_aio_discard(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 63 | bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p" |
| 64 | bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" |
| 65 | bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" |
Markus Armbruster | 025e849 | 2011-09-06 18:58:47 +0200 | [diff] [blame] | 66 | bdrv_lock_medium(void *bs, bool locked) "bs %p locked %d" |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 67 | bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" |
Stefan Hajnoczi | 470c050 | 2012-01-18 14:40:42 +0000 | [diff] [blame] | 68 | bdrv_co_copy_on_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 69 | bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" |
Stefan Hajnoczi | f08f2dd | 2012-02-07 13:27:25 +0000 | [diff] [blame] | 70 | bdrv_co_write_zeroes(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" |
Stefan Hajnoczi | 59370aa | 2011-09-30 17:34:58 +0100 | [diff] [blame] | 71 | bdrv_co_io_em(void *bs, int64_t sector_num, int nb_sectors, int is_write, void *acb) "bs %p sector_num %"PRId64" nb_sectors %d is_write %d acb %p" |
Stefan Hajnoczi | 470c050 | 2012-01-18 14:40:42 +0000 | [diff] [blame] | 72 | bdrv_co_do_copy_on_readv(void *bs, int64_t sector_num, int nb_sectors, int64_t cluster_sector_num, int cluster_nb_sectors) "bs %p sector_num %"PRId64" nb_sectors %d cluster_sector_num %"PRId64" cluster_nb_sectors %d" |
Stefan Hajnoczi | 6d519a5 | 2010-05-22 18:15:08 +0100 | [diff] [blame] | 73 | |
Stefan Hajnoczi | 4f1043b | 2012-01-18 14:40:44 +0000 | [diff] [blame] | 74 | # block/stream.c |
| 75 | stream_one_iteration(void *s, int64_t sector_num, int nb_sectors, int is_allocated) "s %p sector_num %"PRId64" nb_sectors %d is_allocated %d" |
| 76 | stream_start(void *bs, void *base, void *s, void *co, void *opaque) "bs %p base %p s %p co %p opaque %p" |
| 77 | |
Stefan Hajnoczi | 12bd451 | 2012-01-18 14:40:46 +0000 | [diff] [blame] | 78 | # blockdev.c |
Stefan Hajnoczi | 370521a | 2012-01-18 14:40:48 +0000 | [diff] [blame] | 79 | qmp_block_job_cancel(void *job) "job %p" |
Stefan Hajnoczi | 12bd451 | 2012-01-18 14:40:46 +0000 | [diff] [blame] | 80 | block_stream_cb(void *bs, void *job, int ret) "bs %p job %p ret %d" |
| 81 | qmp_block_stream(void *bs, void *job) "bs %p job %p" |
| 82 | |
Stefan Hajnoczi | 6d519a5 | 2010-05-22 18:15:08 +0100 | [diff] [blame] | 83 | # hw/virtio-blk.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 84 | virtio_blk_req_complete(void *req, int status) "req %p status %d" |
| 85 | virtio_blk_rw_complete(void *req, int ret) "req %p ret %d" |
| 86 | virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" |
Stefan Hajnoczi | 81b6b9f | 2011-12-22 13:17:02 +0000 | [diff] [blame] | 87 | virtio_blk_handle_read(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" |
Stefan Hajnoczi | 6d519a5 | 2010-05-22 18:15:08 +0100 | [diff] [blame] | 88 | |
| 89 | # posix-aio-compat.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 90 | paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d" |
| 91 | paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d" |
| 92 | paio_cancel(void *acb, void *opaque) "acb %p opaque %p" |
Prerna Saxena | bd3c9aa | 2010-08-11 17:15:11 +0530 | [diff] [blame] | 93 | |
| 94 | # ioport.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 95 | cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u" |
| 96 | cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u" |
Prerna Saxena | 62dd89d | 2010-08-11 17:16:03 +0530 | [diff] [blame] | 97 | |
| 98 | # balloon.c |
| 99 | # Since requests are raised via monitor, not many tracepoints are needed. |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 100 | balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" |
Blue Swirl | d8023f3 | 2010-10-20 16:41:28 +0000 | [diff] [blame] | 101 | |
| 102 | # hw/apic.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 103 | apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" |
| 104 | apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d" |
Stefan Hajnoczi | 689d7e2 | 2011-09-13 13:34:36 +0100 | [diff] [blame] | 105 | cpu_set_apic_base(uint64_t val) "%016"PRIx64 |
| 106 | cpu_get_apic_base(uint64_t val) "%016"PRIx64 |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 107 | apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" |
| 108 | apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" |
Blue Swirl | d8023f3 | 2010-10-20 16:41:28 +0000 | [diff] [blame] | 109 | # coalescing |
Jan Kiszka | 343270e | 2011-12-13 15:39:04 +0100 | [diff] [blame] | 110 | apic_report_irq_delivered(int apic_irq_delivered) "coalescing %d" |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 111 | apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d" |
| 112 | apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d" |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 113 | |
| 114 | # hw/cs4231.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 115 | cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" |
| 116 | cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" |
| 117 | cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" |
| 118 | cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 119 | |
Hervé Poussineau | d43ed9e | 2011-07-18 23:34:21 +0200 | [diff] [blame] | 120 | # hw/ds1225y.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 121 | nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x" |
| 122 | nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x" |
Hervé Poussineau | d43ed9e | 2011-07-18 23:34:21 +0200 | [diff] [blame] | 123 | |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 124 | # hw/eccmemctl.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 125 | ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" |
| 126 | ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x" |
| 127 | ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x" |
| 128 | ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x" |
| 129 | ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x" |
| 130 | ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x" |
| 131 | ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x" |
| 132 | ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x" |
| 133 | ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x" |
| 134 | ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x" |
| 135 | ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x" |
| 136 | ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x" |
| 137 | ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x" |
| 138 | ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x" |
| 139 | ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x" |
| 140 | ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x" |
| 141 | ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x" |
| 142 | ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x" |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 143 | |
Hervé Poussineau | 63b9932 | 2012-02-17 20:27:15 +0100 | [diff] [blame] | 144 | # hw/jazz-led.c |
| 145 | jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x" |
| 146 | jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x" |
| 147 | |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 148 | # hw/lance.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 149 | lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x" |
| 150 | lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x" |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 151 | |
| 152 | # hw/slavio_intctl.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 153 | slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x" |
| 154 | slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x" |
| 155 | slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x" |
| 156 | slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x" |
| 157 | slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x" |
| 158 | slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x" |
| 159 | slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x" |
| 160 | slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x" |
| 161 | slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d" |
| 162 | slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x" |
| 163 | slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" |
| 164 | slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 165 | |
| 166 | # hw/slavio_misc.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 167 | slavio_misc_update_irq_raise(void) "Raise IRQ" |
| 168 | slavio_misc_update_irq_lower(void) "Lower IRQ" |
| 169 | slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" |
| 170 | slavio_cfg_mem_writeb(uint32_t val) "Write config %02x" |
| 171 | slavio_cfg_mem_readb(uint32_t ret) "Read config %02x" |
| 172 | slavio_diag_mem_writeb(uint32_t val) "Write diag %02x" |
| 173 | slavio_diag_mem_readb(uint32_t ret) "Read diag %02x" |
| 174 | slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x" |
| 175 | slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x" |
| 176 | slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x" |
| 177 | slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x" |
| 178 | slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x" |
| 179 | slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x" |
| 180 | apc_mem_writeb(uint32_t val) "Write power management %02x" |
| 181 | apc_mem_readb(uint32_t ret) "Read power management %02x" |
| 182 | slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x" |
| 183 | slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x" |
| 184 | slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x" |
| 185 | slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x" |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 186 | |
| 187 | # hw/slavio_timer.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 188 | slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x" |
| 189 | slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x" |
Stefan Hajnoczi | 689d7e2 | 2011-09-13 13:34:36 +0100 | [diff] [blame] | 190 | slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64 |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 191 | slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x" |
| 192 | slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x" |
Stefan Hajnoczi | 689d7e2 | 2011-09-13 13:34:36 +0100 | [diff] [blame] | 193 | slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64 |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 194 | slavio_timer_mem_writel_counter_invalid(void) "not user timer" |
| 195 | slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started" |
| 196 | slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped" |
| 197 | slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer" |
| 198 | slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter" |
| 199 | slavio_timer_mem_writel_mode_invalid(void) "not system timer" |
Stefan Hajnoczi | 689d7e2 | 2011-09-13 13:34:36 +0100 | [diff] [blame] | 200 | slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64 |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 201 | |
| 202 | # hw/sparc32_dma.c |
Stefan Hajnoczi | 689d7e2 | 2011-09-13 13:34:36 +0100 | [diff] [blame] | 203 | ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64 |
| 204 | ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64 |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 205 | sparc32_dma_set_irq_raise(void) "Raise IRQ" |
| 206 | sparc32_dma_set_irq_lower(void) "Lower IRQ" |
| 207 | espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" |
| 208 | espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" |
| 209 | sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x" |
| 210 | sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x" |
| 211 | sparc32_dma_enable_raise(void) "Raise DMA enable" |
| 212 | sparc32_dma_enable_lower(void) "Lower DMA enable" |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 213 | |
| 214 | # hw/sun4m.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 215 | sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" |
| 216 | sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" |
| 217 | sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" |
| 218 | sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" |
Blue Swirl | 97bf485 | 2010-10-31 09:24:14 +0000 | [diff] [blame] | 219 | |
| 220 | # hw/sun4m_iommu.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 221 | sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x" |
| 222 | sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x" |
Stefan Hajnoczi | 689d7e2 | 2011-09-13 13:34:36 +0100 | [diff] [blame] | 223 | sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64 |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 224 | sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" |
| 225 | sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" |
| 226 | sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x" |
| 227 | sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" |
Stefan Hajnoczi | 689d7e2 | 2011-09-13 13:34:36 +0100 | [diff] [blame] | 228 | sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64 |
Stefan Hajnoczi | 94b0b5f | 2010-11-16 12:20:25 +0000 | [diff] [blame] | 229 | |
Gerd Hoffmann | 808aeb9 | 2012-02-24 11:03:27 +0100 | [diff] [blame^] | 230 | # hw/usb.c |
| 231 | usb_packet_state_change(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s -> %s" |
| 232 | |
Gerd Hoffmann | 891fb2c | 2011-09-01 13:56:37 +0200 | [diff] [blame] | 233 | # hw/usb-bus.c |
| 234 | usb_port_claim(int bus, const char *port) "bus %d, port %s" |
| 235 | usb_port_attach(int bus, const char *port) "bus %d, port %s" |
| 236 | usb_port_detach(int bus, const char *port) "bus %d, port %s" |
| 237 | usb_port_release(int bus, const char *port) "bus %d, port %s" |
| 238 | |
Gerd Hoffmann | 439a97c | 2011-05-18 10:12:58 +0200 | [diff] [blame] | 239 | # hw/usb-ehci.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 240 | usb_ehci_reset(void) "=== RESET ===" |
| 241 | usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x" |
| 242 | usb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x" |
| 243 | usb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)" |
| 244 | usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d" |
| 245 | usb_ehci_state(const char *schedule, const char *state) "%s schedule %s" |
| 246 | usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x" |
| 247 | usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d" |
| 248 | usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d" |
| 249 | usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x" |
| 250 | usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d" |
| 251 | usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d" |
| 252 | usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d" |
Gerd Hoffmann | 2fe8019 | 2011-08-26 14:13:48 +0200 | [diff] [blame] | 253 | usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: next %08x - active %d" |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 254 | usb_ehci_port_attach(uint32_t port, const char *device) "attach port #%d - %s" |
| 255 | usb_ehci_port_detach(uint32_t port) "detach port #%d" |
| 256 | usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d" |
| 257 | usb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, bufpos %d" |
| 258 | usb_ehci_queue_action(void *q, const char *action) "q %p: %s" |
Gerd Hoffmann | 439a97c | 2011-05-18 10:12:58 +0200 | [diff] [blame] | 259 | |
Gerd Hoffmann | 37fb59d | 2010-11-17 11:03:53 +0100 | [diff] [blame] | 260 | # hw/usb-desc.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 261 | usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d" |
| 262 | usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d" |
| 263 | usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" |
| 264 | usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" |
| 265 | usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d" |
| 266 | usb_set_addr(int addr) "dev %d" |
| 267 | usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d" |
Gerd Hoffmann | 1de14d4 | 2011-08-30 13:21:27 +0200 | [diff] [blame] | 268 | usb_set_interface(int addr, int iface, int alt, int ret) "dev %d, interface %d, altsetting %d, ret %d" |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 269 | usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" |
| 270 | usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" |
Gerd Hoffmann | 37fb59d | 2010-11-17 11:03:53 +0100 | [diff] [blame] | 271 | |
Gerd Hoffmann | e6a2f50 | 2011-08-22 14:13:20 +0200 | [diff] [blame] | 272 | # usb-linux.c |
| 273 | usb_host_open_started(int bus, int addr) "dev %d:%d" |
| 274 | usb_host_open_success(int bus, int addr) "dev %d:%d" |
| 275 | usb_host_open_failure(int bus, int addr) "dev %d:%d" |
| 276 | usb_host_disconnect(int bus, int addr) "dev %d:%d" |
| 277 | usb_host_close(int bus, int addr) "dev %d:%d" |
| 278 | usb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d" |
| 279 | usb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d" |
| 280 | usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d" |
| 281 | usb_host_claim_interfaces(int bus, int addr, int config, int nif) "dev %d:%d, config %d, nif %d" |
| 282 | usb_host_release_interfaces(int bus, int addr) "dev %d:%d" |
| 283 | usb_host_req_control(int bus, int addr, int req, int value, int index) "dev %d:%d, req 0x%x, value %d, index %d" |
| 284 | usb_host_req_data(int bus, int addr, int in, int ep, int size) "dev %d:%d, in %d, ep %d, size %d" |
| 285 | usb_host_req_complete(int bus, int addr, int status) "dev %d:%d, status %d" |
| 286 | usb_host_urb_submit(int bus, int addr, void *aurb, int length, int more) "dev %d:%d, aurb %p, length %d, more %d" |
| 287 | usb_host_urb_complete(int bus, int addr, void *aurb, int status, int length, int more) "dev %d:%d, aurb %p, status %d, length %d, more %d" |
| 288 | usb_host_ep_set_halt(int bus, int addr, int ep) "dev %d:%d, ep %d" |
| 289 | usb_host_ep_clear_halt(int bus, int addr, int ep) "dev %d:%d, ep %d" |
| 290 | usb_host_ep_start_iso(int bus, int addr, int ep) "dev %d:%d, ep %d" |
| 291 | usb_host_ep_stop_iso(int bus, int addr, int ep) "dev %d:%d, ep %d" |
| 292 | usb_host_reset(int bus, int addr) "dev %d:%d" |
| 293 | usb_host_auto_scan_enabled(void) |
| 294 | usb_host_auto_scan_disabled(void) |
Gerd Hoffmann | 9516bb4 | 2011-08-24 13:34:17 +0200 | [diff] [blame] | 295 | usb_host_claim_port(int bus, int hub, int port) "bus %d, hub addr %d, port %d" |
Gerd Hoffmann | e6a2f50 | 2011-08-22 14:13:20 +0200 | [diff] [blame] | 296 | |
Paolo Bonzini | 5138efe | 2011-04-15 11:51:13 +0200 | [diff] [blame] | 297 | # hw/scsi-bus.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 298 | scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d" |
| 299 | scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" |
Paolo Bonzini | e88c591 | 2011-10-25 12:53:33 +0200 | [diff] [blame] | 300 | scsi_req_data_canceled(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 301 | scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d" |
| 302 | scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d" |
| 303 | scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d" |
Stefan Hajnoczi | 689d7e2 | 2011-09-13 13:34:36 +0100 | [diff] [blame] | 304 | scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64 |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 305 | scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d" |
| 306 | scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x" |
| 307 | scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d" |
| 308 | scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x" |
| 309 | scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d" |
| 310 | scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d" |
Paolo Bonzini | 5138efe | 2011-04-15 11:51:13 +0200 | [diff] [blame] | 311 | |
Stefan Hajnoczi | 94b0b5f | 2010-11-16 12:20:25 +0000 | [diff] [blame] | 312 | # vl.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 313 | vm_state_notify(int running, int reason) "running %d reason %d" |
Stefan Hajnoczi | 298800c | 2010-12-06 16:08:01 +0000 | [diff] [blame] | 314 | |
| 315 | # block/qed-l2-cache.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 316 | qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p" |
| 317 | qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d" |
| 318 | qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d" |
Stefan Hajnoczi | 298800c | 2010-12-06 16:08:01 +0000 | [diff] [blame] | 319 | |
| 320 | # block/qed-table.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 321 | qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p" |
| 322 | qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d" |
| 323 | qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u" |
| 324 | qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d" |
Stefan Hajnoczi | eabba58 | 2010-12-06 16:08:02 +0000 | [diff] [blame] | 325 | |
| 326 | # block/qed.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 327 | qed_need_check_timer_cb(void *s) "s %p" |
| 328 | qed_start_need_check_timer(void *s) "s %p" |
| 329 | qed_cancel_need_check_timer(void *s) "s %p" |
| 330 | qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d" |
Stefan Hajnoczi | 6e4f59b | 2012-02-07 13:27:27 +0000 | [diff] [blame] | 331 | qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int flags) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p flags %#x" |
Stefan Hajnoczi | 689d7e2 | 2011-09-13 13:34:36 +0100 | [diff] [blame] | 332 | qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64 |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 333 | qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" |
| 334 | qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" |
Stefan Hajnoczi | 689d7e2 | 2011-09-13 13:34:36 +0100 | [diff] [blame] | 335 | qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64 |
| 336 | qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64 |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 337 | qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" |
Fabien Chouteau | 0f3a4a0 | 2011-01-24 12:56:52 +0100 | [diff] [blame] | 338 | |
Hervé Poussineau | b213b37 | 2011-08-26 21:20:11 +0200 | [diff] [blame] | 339 | # hw/g364fb.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 340 | g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x" |
| 341 | g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x" |
Hervé Poussineau | b213b37 | 2011-08-26 21:20:11 +0200 | [diff] [blame] | 342 | |
Fabien Chouteau | 0f3a4a0 | 2011-01-24 12:56:52 +0100 | [diff] [blame] | 343 | # hw/grlib_gptimer.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 344 | grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run" |
| 345 | grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x" |
| 346 | grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x" |
| 347 | grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x" |
| 348 | grlib_gptimer_hit(int id) "timer:%d HIT" |
| 349 | grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" |
| 350 | grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" |
Fabien Chouteau | 3f10bcb | 2011-01-24 12:56:53 +0100 | [diff] [blame] | 351 | |
| 352 | # hw/grlib_irqmp.c |
Stefan Hajnoczi | 2f4a725 | 2011-09-13 13:34:34 +0100 | [diff] [blame] | 353 | grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x" |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 354 | grlib_irqmp_ack(int intno) "interrupt:%d" |
| 355 | grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d" |
Stefan Hajnoczi | 689d7e2 | 2011-09-13 13:34:36 +0100 | [diff] [blame] | 356 | grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64 |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 357 | grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" |
Fabien Chouteau | 8b1e132 | 2011-01-24 12:56:54 +0100 | [diff] [blame] | 358 | |
| 359 | # hw/grlib_apbuart.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 360 | grlib_apbuart_event(int event) "event:%d" |
| 361 | grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" |
Fabien Chouteau | 0c685d2 | 2012-01-26 18:03:15 +0100 | [diff] [blame] | 362 | grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64"" |
Fabien Chouteau | b04d989 | 2011-01-24 12:56:55 +0100 | [diff] [blame] | 363 | |
| 364 | # hw/leon3.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 365 | leon3_set_irq(int intno) "Set CPU IRQ %d" |
| 366 | leon3_reset_irq(int intno) "Reset CPU IRQ %d" |
Anthony Liguori | 9363ee3 | 2011-02-01 15:22:48 -0600 | [diff] [blame] | 367 | |
Alon Levy | cbcc633 | 2011-01-19 10:49:50 +0200 | [diff] [blame] | 368 | # spice-qemu-char.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 369 | spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d" |
| 370 | spice_vmc_read(int bytes, int len) "spice read %d of requested %d" |
| 371 | spice_vmc_register_interface(void *scd) "spice vmc registered interface %p" |
| 372 | spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p" |
Michael Walle | 4ef66fa | 2011-02-17 23:45:07 +0100 | [diff] [blame] | 373 | |
| 374 | # hw/lm32_pic.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 375 | lm32_pic_raise_irq(void) "Raise CPU interrupt" |
| 376 | lm32_pic_lower_irq(void) "Lower CPU interrupt" |
| 377 | lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d" |
| 378 | lm32_pic_set_im(uint32_t im) "im 0x%08x" |
| 379 | lm32_pic_set_ip(uint32_t ip) "ip 0x%08x" |
| 380 | lm32_pic_get_im(uint32_t im) "im 0x%08x" |
| 381 | lm32_pic_get_ip(uint32_t ip) "ip 0x%08x" |
Michael Walle | 15d7dc4 | 2011-02-17 23:45:08 +0100 | [diff] [blame] | 382 | |
| 383 | # hw/lm32_juart.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 384 | lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x" |
| 385 | lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x" |
| 386 | lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x" |
| 387 | lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x" |
Michael Walle | ea7924d | 2011-02-17 23:45:10 +0100 | [diff] [blame] | 388 | |
| 389 | # hw/lm32_timer.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 390 | lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
| 391 | lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
| 392 | lm32_timer_hit(void) "timer hit" |
| 393 | lm32_timer_irq_state(int level) "irq state %d" |
Michael Walle | 770ae57 | 2011-02-17 23:45:11 +0100 | [diff] [blame] | 394 | |
| 395 | # hw/lm32_uart.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 396 | lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
| 397 | lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
| 398 | lm32_uart_irq_state(int level) "irq state %d" |
Michael Walle | f19410c | 2011-02-17 23:45:12 +0100 | [diff] [blame] | 399 | |
| 400 | # hw/lm32_sys.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 401 | lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
Michael Walle | 25a8bb9 | 2011-03-07 23:32:32 +0100 | [diff] [blame] | 402 | |
| 403 | # hw/milkymist-ac97.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 404 | milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 405 | milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 406 | milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request" |
| 407 | milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply" |
| 408 | milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write" |
| 409 | milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read" |
| 410 | milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u" |
| 411 | milkymist_ac97_in_cb_transferred(int transferred) "transferred %d" |
| 412 | milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u" |
| 413 | milkymist_ac97_out_cb_transferred(int transferred) "transferred %d" |
Michael Walle | e4dc6d2 | 2011-03-07 23:32:33 +0100 | [diff] [blame] | 414 | |
| 415 | # hw/milkymist-hpdmc.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 416 | milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x" |
| 417 | milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x" |
Michael Walle | b4e37d9 | 2011-03-07 23:32:34 +0100 | [diff] [blame] | 418 | |
| 419 | # hw/milkymist-memcard.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 420 | milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 421 | milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
Michael Walle | 0742454 | 2011-03-07 23:32:35 +0100 | [diff] [blame] | 422 | |
Michael Walle | 57aa265 | 2011-04-13 00:29:36 +0200 | [diff] [blame] | 423 | # hw/milkymist-minimac2.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 424 | milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 425 | milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 426 | milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" |
| 427 | milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" |
| 428 | milkymist_minimac2_tx_frame(uint32_t length) "length %u" |
| 429 | milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u" |
| 430 | milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p" |
| 431 | milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d" |
| 432 | milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX" |
| 433 | milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX" |
| 434 | milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX" |
Michael Walle | 5ee18b9 | 2011-03-07 23:32:36 +0100 | [diff] [blame] | 435 | |
| 436 | # hw/milkymist-pfpu.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 437 | milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 438 | milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 439 | milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x" |
| 440 | milkymist_pfpu_pulse_irq(void) "Pulse IRQ" |
Michael Walle | 87a381e | 2011-03-07 23:32:37 +0100 | [diff] [blame] | 441 | |
| 442 | # hw/milkymist-softusb.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 443 | milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 444 | milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 445 | milkymist_softusb_mevt(uint8_t m) "m %d" |
| 446 | milkymist_softusb_kevt(uint8_t m) "m %d" |
| 447 | milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x" |
| 448 | milkymist_softusb_pulse_irq(void) "Pulse IRQ" |
Michael Walle | 9683242 | 2011-03-07 23:32:38 +0100 | [diff] [blame] | 449 | |
| 450 | # hw/milkymist-sysctl.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 451 | milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 452 | milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 453 | milkymist_sysctl_icap_write(uint32_t value) "value %08x" |
| 454 | milkymist_sysctl_start_timer0(void) "Start timer0" |
| 455 | milkymist_sysctl_stop_timer0(void) "Stop timer0" |
| 456 | milkymist_sysctl_start_timer1(void) "Start timer1" |
| 457 | milkymist_sysctl_stop_timer1(void) "Stop timer1" |
| 458 | milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0" |
| 459 | milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1" |
Michael Walle | 0670dad | 2011-03-07 23:32:40 +0100 | [diff] [blame] | 460 | |
| 461 | # hw/milkymist-tmu2.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 462 | milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 463 | milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 464 | milkymist_tmu2_start(void) "Start TMU" |
| 465 | milkymist_tmu2_pulse_irq(void) "Pulse IRQ" |
Michael Walle | 883de16 | 2011-03-07 23:32:41 +0100 | [diff] [blame] | 466 | |
| 467 | # hw/milkymist-uart.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 468 | milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 469 | milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
Michael Walle | fcfa339 | 2011-08-11 00:13:23 +0200 | [diff] [blame] | 470 | milkymist_uart_raise_irq(void) "Raise IRQ" |
| 471 | milkymist_uart_lower_irq(void) "Lower IRQ" |
Michael Walle | d23948b | 2011-03-07 23:32:42 +0100 | [diff] [blame] | 472 | |
| 473 | # hw/milkymist-vgafb.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 474 | milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
| 475 | milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 476 | |
Hervé Poussineau | 83818f7 | 2011-09-04 22:29:27 +0200 | [diff] [blame] | 477 | # hw/mipsnet.c |
| 478 | mipsnet_send(uint32_t size) "sending len=%u" |
| 479 | mipsnet_receive(uint32_t size) "receiving len=%u" |
| 480 | mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x" |
Paolo Bonzini | 903ec8e | 2011-09-13 17:47:52 +0200 | [diff] [blame] | 481 | mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 "" |
Hervé Poussineau | 83818f7 | 2011-09-04 22:29:27 +0200 | [diff] [blame] | 482 | mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)" |
| 483 | |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 484 | # xen-all.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 485 | xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx" |
Avi Kivity | 20581d2 | 2011-12-19 12:07:50 +0200 | [diff] [blame] | 486 | xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) "%#"PRIx64" size %#lx, log_dirty %i" |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 487 | |
| 488 | # xen-mapcache.c |
Stefan Hajnoczi | 689d7e2 | 2011-09-13 13:34:36 +0100 | [diff] [blame] | 489 | xen_map_cache(uint64_t phys_addr) "want %#"PRIx64 |
| 490 | xen_remap_bucket(uint64_t index) "index %#"PRIx64 |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 491 | xen_map_cache_return(void* ptr) "%p" |
Stefan Hajnoczi | 689d7e2 | 2011-09-13 13:34:36 +0100 | [diff] [blame] | 492 | xen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64 |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 493 | xen_unmap_block(void* addr, unsigned long size) "%p, size %#lx" |
Anthony PERARD | 050a0dd | 2010-09-16 13:57:49 +0100 | [diff] [blame] | 494 | |
| 495 | # exec.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 496 | qemu_put_ram_ptr(void* addr) "%p" |
Steven Smith | 01195b7 | 2011-06-16 17:05:17 +0100 | [diff] [blame] | 497 | |
| 498 | # hw/xen_platform.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 499 | xen_platform_log(char *s) "xen platform: %s" |
Kevin Wolf | 00dccaf | 2011-01-17 16:08:14 +0000 | [diff] [blame] | 500 | |
| 501 | # qemu-coroutine.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 502 | qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p" |
| 503 | qemu_coroutine_yield(void *from, void *to) "from %p to %p" |
| 504 | qemu_coroutine_terminate(void *co) "self %p" |
Kevin Wolf | b96e924 | 2011-06-30 17:56:46 +0200 | [diff] [blame] | 505 | |
| 506 | # qemu-coroutine-lock.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 507 | qemu_co_queue_next_bh(void) "" |
| 508 | qemu_co_queue_next(void *next) "next %p" |
| 509 | qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p" |
| 510 | qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p" |
| 511 | qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p" |
| 512 | qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p" |
Blue Swirl | 30c2f23 | 2011-08-07 11:01:05 +0000 | [diff] [blame] | 513 | |
| 514 | # hw/escc.c |
Lluís | 47f08d7 | 2011-08-31 20:31:58 +0200 | [diff] [blame] | 515 | escc_put_queue(char channel, int b) "channel %c put: 0x%02x" |
| 516 | escc_get_queue(char channel, int val) "channel %c get 0x%02x" |
| 517 | escc_update_irq(int irq) "IRQ = %d" |
| 518 | escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d" |
| 519 | escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x" |
| 520 | escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d" |
| 521 | escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x" |
| 522 | escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d" |
| 523 | escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d" |
| 524 | escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x" |
| 525 | escc_sunkbd_event_out(int ch) "Translated keycode %2.2x" |
| 526 | escc_kbd_command(int val) "Command %d" |
| 527 | escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x" |
Blue Swirl | bf4b988 | 2011-09-11 15:54:18 +0000 | [diff] [blame] | 528 | |
Ronnie Sahlberg | c589b24 | 2011-10-25 19:24:24 +1100 | [diff] [blame] | 529 | # block/iscsi.c |
| 530 | iscsi_aio_write10_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d" |
| 531 | iscsi_aio_writev(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p" |
| 532 | iscsi_aio_read10_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p status %d acb %p canceled %d" |
| 533 | iscsi_aio_readv(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p" |
| 534 | |
Blue Swirl | bf4b988 | 2011-09-11 15:54:18 +0000 | [diff] [blame] | 535 | # hw/esp.c |
| 536 | esp_raise_irq(void) "Raise IRQ" |
| 537 | esp_lower_irq(void) "Lower IRQ" |
| 538 | esp_dma_enable(void) "Raise enable" |
| 539 | esp_dma_disable(void) "Lower enable" |
| 540 | esp_get_cmd(uint32_t dmalen, int target) "len %d target %d" |
| 541 | esp_do_busid_cmd(uint8_t busid) "busid 0x%x" |
| 542 | esp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d" |
| 543 | esp_write_response(uint32_t status) "Transfer status (status=%d)" |
| 544 | esp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d" |
| 545 | esp_command_complete(void) "SCSI Command complete" |
| 546 | esp_command_complete_unexpected(void) "SCSI command completed unexpectedly" |
| 547 | esp_command_complete_fail(void) "Command failed" |
| 548 | esp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d" |
| 549 | esp_handle_ti(uint32_t minlen) "Transfer Information len %d" |
| 550 | esp_handle_ti_cmd(uint32_t cmdlen) "command len %d" |
| 551 | esp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x" |
| 552 | esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x" |
| 553 | esp_mem_writeb_cmd_nop(uint32_t val) "NOP (%2.2x)" |
| 554 | esp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (%2.2x)" |
| 555 | esp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (%2.2x)" |
| 556 | esp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (%2.2x)" |
| 557 | esp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence (%2.2x)" |
| 558 | esp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (%2.2x)" |
| 559 | esp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (%2.2x)" |
| 560 | esp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (%2.2x)" |
| 561 | esp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (%2.2x)" |
| 562 | esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)" |
| 563 | esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)" |
| 564 | esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)" |
Stefan Hajnoczi | 89bd820 | 2011-09-23 08:23:06 +0100 | [diff] [blame] | 565 | |
| 566 | # monitor.c |
| 567 | handle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\"" |
| 568 | monitor_protocol_emitter(void *mon) "mon %p" |
Max Filippov | 342407f | 2011-10-16 02:56:45 +0400 | [diff] [blame] | 569 | |
| 570 | # hw/opencores_eth.c |
| 571 | open_eth_mii_write(unsigned idx, uint16_t v) "MII[%02x] <- %04x" |
| 572 | open_eth_mii_read(unsigned idx, uint16_t v) "MII[%02x] -> %04x" |
| 573 | open_eth_update_irq(uint32_t v) "IRQ <- %x" |
| 574 | open_eth_receive(unsigned len) "RX: len: %u" |
| 575 | open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) "MCAST: idx = %u, hash: %08x:%08x" |
| 576 | open_eth_receive_reject(void) "RX: rejected" |
| 577 | open_eth_receive_desc(uint32_t addr, uint32_t len_flags) "RX: %08x, len_flags: %08x" |
| 578 | open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) "TX: %08x, len: %u, tx_len: %u" |
| 579 | open_eth_reg_read(uint32_t addr, uint32_t v) "MAC[%02x] -> %08x" |
| 580 | open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[%02x] <- %08x" |
| 581 | open_eth_desc_read(uint32_t addr, uint32_t v) "DESC[%04x] -> %08x" |
| 582 | open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[%04x] <- %08x" |
Anthony Liguori | 1f99b94 | 2011-10-20 08:42:08 -0500 | [diff] [blame] | 583 | |
Harsh Prateek Bora | c572f23 | 2011-10-12 19:11:25 +0530 | [diff] [blame] | 584 | # hw/9pfs/virtio-9p.c |
Aneesh Kumar K.V | 7999f7e | 2011-10-24 15:09:49 +0530 | [diff] [blame] | 585 | v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d" |
Harsh Prateek Bora | c572f23 | 2011-10-12 19:11:25 +0530 | [diff] [blame] | 586 | v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" |
| 587 | v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" |
Stefan Weil | c76eaf1 | 2011-10-20 21:55:58 +0200 | [diff] [blame] | 588 | v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s" |
Harsh Prateek Bora | c572f23 | 2011-10-12 19:11:25 +0530 | [diff] [blame] | 589 | v9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64"" |
| 590 | v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" |
| 591 | v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}" |
| 592 | v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64"" |
| 593 | v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}" |
| 594 | v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d" |
| 595 | v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p" |
| 596 | v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d" |
| 597 | v9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" |
| 598 | v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u" |
| 599 | v9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" |
| 600 | v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d" |
| 601 | v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" |
Aneesh Kumar K.V | 2f008a8 | 2011-12-21 12:37:23 +0530 | [diff] [blame] | 602 | v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) "tag %d id %d fid %d off %"PRIu64" max_count %u" |
Harsh Prateek Bora | c572f23 | 2011-10-12 19:11:25 +0530 | [diff] [blame] | 603 | v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd" |
Aneesh Kumar K.V | 2f008a8 | 2011-12-21 12:37:23 +0530 | [diff] [blame] | 604 | v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) "tag %d id %d fid %d offset %"PRIu64" max_count %u" |
| 605 | v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) "tag %d id %d count %u retval %zd" |
| 606 | v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) "tag %d id %d fid %d off %"PRIu64" count %u cnt %d" |
Harsh Prateek Bora | c572f23 | 2011-10-12 19:11:25 +0530 | [diff] [blame] | 607 | v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd" |
| 608 | v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d" |
| 609 | v9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" |
| 610 | v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u" |
| 611 | v9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}" |
| 612 | v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d" |
| 613 | v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s" |
| 614 | v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" |
Stefan Weil | c76eaf1 | 2011-10-20 21:55:58 +0200 | [diff] [blame] | 615 | v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}" |
Harsh Prateek Bora | c572f23 | 2011-10-12 19:11:25 +0530 | [diff] [blame] | 616 | v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d" |
| 617 | v9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}" |
| 618 | v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64"" |
| 619 | v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d" |
| 620 | v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64"" |
| 621 | v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u" |
Stefan Weil | c76eaf1 | 2011-10-20 21:55:58 +0200 | [diff] [blame] | 622 | v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u" |
| 623 | v9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d" |
Harsh Prateek Bora | c572f23 | 2011-10-12 19:11:25 +0530 | [diff] [blame] | 624 | v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s" |
| 625 | v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64"" |
| 626 | v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d" |
| 627 | v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" |
| 628 | v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s" |
Blue Swirl | ec0ceb1 | 2011-09-11 14:51:24 +0000 | [diff] [blame] | 629 | |
| 630 | # target-sparc/mmu_helper.c |
| 631 | mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d" |
| 632 | mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d" |
| 633 | mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64"" |
| 634 | mmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64"" |
| 635 | mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64"" |
| 636 | mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64"" |
| 637 | mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64"" |
| 638 | mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64"" |
Blue Swirl | 11e66bc | 2011-09-11 15:05:41 +0000 | [diff] [blame] | 639 | |
| 640 | # target-sparc/int_helper.c |
| 641 | int_helper_set_softint(uint32_t softint) "new %08x" |
| 642 | int_helper_clear_softint(uint32_t softint) "new %08x" |
| 643 | int_helper_write_softint(uint32_t softint) "new %08x" |
| 644 | int_helper_icache_freeze(void) "Instruction cache: freeze" |
| 645 | int_helper_dcache_freeze(void) "Data cache: freeze" |
Blue Swirl | 870be6a | 2011-09-11 15:53:35 +0000 | [diff] [blame] | 646 | |
| 647 | # target-sparc/win_helper.c |
| 648 | win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x" |
| 649 | win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x" |
| 650 | win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)" |
| 651 | win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x" |
| 652 | win_helper_done(uint32_t tl) "tl=%d" |
| 653 | win_helper_retry(uint32_t tl) "tl=%d" |
Kevin Wolf | c57c465 | 2011-11-24 06:15:28 -0500 | [diff] [blame] | 654 | |
| 655 | # dma-helpers.c |
| 656 | dma_bdrv_io(void *dbs, void *bs, int64_t sector_num, bool to_dev) "dbs=%p bs=%p sector_num=%" PRId64 " to_dev=%d" |
| 657 | dma_aio_cancel(void *dbs) "dbs=%p" |
| 658 | dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p" |
| 659 | dma_bdrv_cb(void *dbs, int ret) "dbs=%p ret=%d" |
| 660 | dma_map_wait(void *dbs) "dbs=%p" |